SL

Sharon Sheau-Pyng Lin

AS Axis Systems: 8 patents #2 of 11Top 20%
CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
MIT: 1 patents #4,386 of 9,367Top 50%
VD Verisity Design: 1 patents #5 of 7Top 75%
Overall (All Time): #375,306 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDate
11472915 Porous compositions and related methods Timothy M. Swager, Yuan He, Zachary Smith, Francesco Maria Benedetti 2022-10-18
9195784 Common shared memory in a verification system Ping-Sheng Tseng, Quincy Kun-Hsu Shen, Mike Mon Yen Tsai, Steven Wang 2015-11-24
8244512 Method and apparatus for simulating a circuit using timing insensitive glitch-free (TIGF) logic Ping-Sheng Tseng, Quincy Kun-Hsu Shen, Mike Mon Yen Tsai, Steven Wang 2012-08-14
7505891 Multi-user server system and method 2009-03-17
6810442 Memory mapping system and method Ping-Sheng Tseng 2004-10-26
6754763 Multi-board connection system for use in electronic design automation 2004-06-22
6651225 Dynamic evaluation logic system and method Ping-Sheng Tseng, Chwen-Cher Chang, Su-Jen Hwang 2003-11-18
6421251 Array board interconnect system and method 2002-07-16
6389379 Converification system and method Ping-Sheng Tseng 2002-05-14
6321366 Timing-insensitive glitch-free logic system and method Ping-Sheng Tseng, Quincy Kun-Hsu Shen 2001-11-20
6134516 Simulation server system and method Steven Wang, Ping-Sheng Tseng, Ren-Song Tsay, Richard Yachyang Sun, Quincy Kun-Hsu Shen +1 more 2000-10-17
6026230 Memory simulation system and method Ping-Sheng Tseng 2000-02-15
6009256 Simulation/emulation system and method Ping-Sheng Tseng, Quincy Kun-Hsu Shen, Richard Yachyang Sun, Mike Mon Yen Tsai, Ren-Song Tsay +1 more 1999-12-28