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Thermal management in horizontally or vertically stacked dies |
Somvir Dahiya, Stephen H. Gunther, Julien Sebot, Randy B. Osborne, Joshua Een |
2025-03-04 |
| 10068866 |
Integrated circuit package having rectangular aspect ratio |
Darren Crews |
2018-09-04 |
| 7271434 |
Capacitor with insulating nanostructure |
Sarah Kim |
2007-09-18 |
| 7265406 |
Capacitor with conducting nanostructure |
Sarah Kim |
2007-09-04 |
| 7244983 |
Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode |
Sarah Kim |
2007-07-17 |
| 7157787 |
Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices |
Sarah Kim, R. Scott List |
2007-01-02 |
| 7091084 |
Ultra-high capacitance device based on nanostructures |
Sarah Kim |
2006-08-15 |
| 7056807 |
Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack |
Sarah Kim, R. Scott List |
2006-06-06 |
| 7037804 |
Wafer bonding using a flexible bladder press for three dimensional (3D) vertical stack integration |
Sarah Kim, R. Scott List |
2006-05-02 |
| 6975016 |
Wafer bonding using a flexible bladder press and thinned wafers for three-dimensional (3D) wafer-to-wafer vertical stack integration, and application thereof |
Sarah Kim, R. Scott List |
2005-12-13 |
| 6911373 |
Ultra-high capacitance device based on nanostructures |
Sarah Kim |
2005-06-28 |
| 6887769 |
Dielectric recess for wafer-to-wafer and die-to-die metal bonding and method of fabricating the same |
Sarah Kim, R. Scott List |
2005-05-03 |
| 6762076 |
Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices |
Sarah Kim, R. Scott List |
2004-07-13 |
| 6661085 |
Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack |
Sarah Kim, R. Scott List |
2003-12-09 |
| 6599808 |
Method and device for on-chip decoupling capacitor using nanostructures as bottom electrode |
Sarah Kim |
2003-07-29 |