RB

Richard Burton

AI Atomera Incorporated: 31 patents #5 of 20Top 25%
TI Teledyne Instruments: 1 patents #70 of 134Top 55%
Overall (All Time): #109,397 of 4,157,543Top 3%
32
Patents All Time

Issued Patents All Time

Showing 1–25 of 32 patents

Patent #TitleCo-InventorsDate
12382689 Method for making DMOS devices including a superlattice and field plate for drift region diffusion Shuyi Li 2025-08-05
12199180 Semiconductor device including a superlattice and an asymmetric channel and related methods Hideki Takeuchi, Yung-Hsuan Yang 2025-01-14
11935940 Methods for making bipolar junction transistors including emitter-base and base-collector superlattices 2024-03-19
11923431 Bipolar junction transistors including emitter-base and base-collector superlattices 2024-03-05
11869968 Semiconductor device including a superlattice and an asymmetric channel and related methods Hideki Takeuchi, Yung-Hsuan Yang 2024-01-09
11664427 Vertical semiconductor device with enhanced contact structure and associated methods Robert John Stephenson, Dmitri A. Choutov, Nyles Wynn Cody, Daniel J. Connelly, Robert J. Mears +1 more 2023-05-30
11437486 Methods for making bipolar junction transistors including emitter-base and base-collector superlattices 2022-09-06
11437487 Bipolar junction transistors including emitter-base and base-collector superlattices 2022-09-06
11387325 Vertical semiconductor device with enhanced contact structure and associated methods Robert John Stephenson, Dmitri A. Choutov, Nyles Wynn Cody, Daniel J. Connelly, Robert J. Mears +1 more 2022-07-12
11329154 Semiconductor device including a superlattice and an asymmetric channel and related methods Hideki Takeuchi, Yung-Hsuan Yang 2022-05-10
11183565 Semiconductor devices including hyper-abrupt junction region including spaced-apart superlattices and related methods Marek Hytha, Robert J. Mears 2021-11-23
11094818 Method for making a semiconductor device including a superlattice and an asymmetric channel and related methods Hideki Takeuchi, Yung-Hsuan Yang 2021-08-17
11075078 Method for making a semiconductor device including a superlattice within a recessed etch Nyles Wynn Cody, Keith Doran Weeks, Robert John Stephenson, Yi-Ann Chen, Dmitri A. Choutov +2 more 2021-07-27
10937888 Method for making a varactor with a hyper-abrupt junction region including spaced-apart superlattices Marek Hytha, Robert J. Mears 2021-03-02
10937868 Method for making semiconductor devices with hyper-abrupt junction region including spaced-apart superlattices Marek Hytha, Robert J. Mears 2021-03-02
10879357 Method for making a semiconductor device having a hyper-abrupt junction region including a superlattice Marek Hytha, Robert J. Mears 2020-12-29
10879356 Method for making a semiconductor device including enhanced contact structures having a superlattice Robert John Stephenson, Dmitri A. Choutov, Nyles Wynn Cody, Daniel J. Connelly, Robert J. Mears +1 more 2020-12-29
10868120 Method for making a varactor with hyper-abrupt junction region including a superlattice Marek Hytha, Robert J. Mears 2020-12-15
10854717 Method for making a FINFET including source and drain dopant diffusion blocking superlattices to reduce contact resistance Hideki Takeuchi, Daniel J. Connelly, Marek Hytha, Robert J. Mears 2020-12-01
10847618 Semiconductor device including body contact dopant diffusion blocking superlattice having reduced contact resistance Hideki Takeuchi, Daniel J. Connelly, Marek Hytha, Robert J. Mears 2020-11-24
10840388 Varactor with hyper-abrupt junction region including a superlattice Marek Hytha, Robert J. Mears 2020-11-17
10840335 Method for making semiconductor device including body contact dopant diffusion blocking superlattice to reduce contact resistance Hideki Takeuchi, Daniel J. Connelly, Marek Hytha, Robert J. Mears 2020-11-17
10840336 Semiconductor device with metal-semiconductor contacts including oxygen insertion layer to constrain dopants and related methods Daniel J. Connelly, Marek Hytha, Hideki Takeuchi, Robert J. Mears 2020-11-17
10840337 Method for making a FINFET having reduced contact resistance Hideki Takeuchi, Daniel J. Connelly, Marek Hytha, Robert J. Mears 2020-11-17
10825901 Semiconductor devices including hyper-abrupt junction region including a superlattice Marek Hytha, Robert J. Mears 2020-11-03