Issued Patents All Time
Showing 1–25 of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12332743 | Efficient memory use to support soft information in bit flipping decoders | Mustafa N. Kaynak, Eyal En Gad, Zhengang Chen, Sivagnanam Parthasarathy, Dung Viet Nguyen | 2025-06-17 |
| 12277978 | Selective and dynamic deployment of error correction code techniques in integrated circuit memory devices | James Fitzpatrick, Dung Viet Nguyen, Sivagnanam Parthasarathy | 2025-04-15 |
| 12141437 | Program command generation with dummy data generation at a memory device | Jeremy Binfet, Violante Moschiano, James Fitzpatrick, Kishore Kumar Muccherla, Jeffrey S. McNeil | 2024-11-12 |
| 12073892 | Simplified operations to read memory cells coarsely programmed via interleaved two-pass data programming techniques | James Fitzpatrick, Kishore Kumar Muchherla | 2024-08-27 |
| 11990186 | One-ladder read of memory cells coarsely programmed via interleaved two-pass data programming techniques | James Fitzpatrick, Kishore Kumar Muchherla | 2024-05-21 |
| 11984171 | Selective and dynamic deployment of error correction code techniques in integrated circuit memory devices | James Fitzpatrick, Dung Viet Nguyen, Sivagnanam Parthasarathy | 2024-05-14 |
| 11869595 | Memory device programming technique using fewer latches | Dung Viet Nguyen | 2024-01-09 |
| 11830545 | Data programming techniques to store multiple bits of data per memory cell with high reliability | James Fitzpatrick | 2023-11-28 |
| 11829650 | Memory sub-system data migration | Ting Luo, Xiangang Luo, Jianmin Huang | 2023-11-28 |
| 11726931 | Artificial intelligence-enabled management of storage media access | Christophe Therene, Nedeljko Varnica | 2023-08-15 |
| 11699491 | Double interleaved programming of a memory device in a memory sub-system | James Fitzpatrick, Kishore Kumar Muchherla | 2023-07-11 |
| 11675655 | Solid-state drive error recovery based on machine learning | Dung Viet Nguyen, Christophe Therene, Nedeljko Varnica | 2023-06-13 |
| 11663079 | Data recovery using a combination of error correction schemes | Dung Viet Nguyen, Sivagnanam Parthasarathy | 2023-05-30 |
| 11593032 | Memory sub-system data migration | Ting Luo, Xiangang Luo, Jianmin Huang | 2023-02-28 |
| 11568937 | Memory device programming techinique using fewer latches | Dung Viet Nguyen | 2023-01-31 |
| 11467991 | Artificial intelligence-enabled management of storage media access | Christophe Therene, Nedeljko Varnica | 2022-10-11 |
| 11462265 | Reading memory cells coarsely programmed via interleaved two-pass data programming techniques | James Fitzpatrick, Kishore Kumar Muchherla | 2022-10-04 |
| 11456038 | Simplified operations to read memory cells coarsely programmed via interleaved two-pass data programming techniques | James Fitzpatrick, Kishore Kumar Muchherla | 2022-09-27 |
| 11442809 | Double-parity raid enabling recovery of two failed data units | — | 2022-09-13 |
| 11430526 | Interleaved two-pass data programming techniques with reduced write amplification | James Fitzpatrick, Kishore Kumar Muchherla | 2022-08-30 |
| 11335407 | One-ladder read of memory cells coarsely programmed via interleaved two-pass data programming techniques | James Fitzpatrick, Kishore Kumar Muchherla | 2022-05-17 |
| 11275646 | Solid-state drive error recovery based on machine learning | Dung Viet Nguyen, Christophe Therene, Nedeljko Varnica | 2022-03-15 |
| 11010314 | Artificial intelligence-enabled management of storage media access | Christophe Therene, Nedeljko Varnica | 2021-05-18 |
| 10587288 | Systems and methods for iterative coding of product codes in nand FLASH controllers | Shashi Kiran Chilappagari | 2020-03-10 |
| 10411735 | Systems and methods for an iterative decoding scheme | Shashi Kiran Chilappagari, Dung Viet Nguyen | 2019-09-10 |