Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9928331 | Method and control device for circuit layout migration | Vladimir P. Rozenfeld, Robert L. Maziasz | 2018-03-27 |
| 9916412 | Automatic generation of test layouts for testing a design rule checking tool | Alexander Leonidovich Kerre | 2018-03-13 |
| 9659132 | Method of generating a target layout on the basis of a source layout | Alexander Leonidovich Kerre | 2017-05-23 |
| 9099265 | High-voltage disconnection knife for outdoor use with air insulation | — | 2015-08-04 |
| 8978004 | Cell routability prioritization | Robert L. Maziasz, Alexander Leonidovich Kerre, Vladimir P. Rozenfeld, Igor G. Topouzov | 2015-03-10 |
| 7086027 | Method and apparatus for constraint graph based layout compaction for integrated circuits | Venkata K. R. Chiluvuri, Alexander Marchenko | 2006-08-01 |
| 6564366 | Method for channel routing, and apparatus | Alexander Marchenko, Andrey P. Plis, Patrick Mcguinness | 2003-05-13 |
| 6477692 | Method and apparatus for channel-routing of an electronic device | Alexander Marchenko, Andrey P. Plis, Eugene G. Shiro, Igor G. Topouzov, Patrick McGuiness | 2002-11-05 |
| 6434721 | Method and apparatus for constraint graph based layout compaction for integrated circuits | Venkata K. R. Chiluvuri, Alexander Marchenko | 2002-08-13 |