| 4774202 |
Memory device with interconnected polysilicon layers and method for making |
David S. Pan, Kanak C. Sarma, Alexander H. Owens, Brian K. Rosier |
1988-09-27 |
| 4706102 |
Memory device with interconnected polysilicon layers and method for making |
David S. Pan, Kanak C. Sarma, Alexander H. Owens, Brian K. Rosier |
1987-11-10 |
| 4646425 |
Method for making a self-aligned CMOS EPROM wherein the EPROM floating gate and CMOS gates are made from one polysilicon layer |
Alexander H. Owens, David S. Pan |
1987-03-03 |
| 4598460 |
Method of making a CMOS EPROM with independently selectable thresholds |
Alexander H. Owens, David S. Pan |
1986-07-08 |
| 4590665 |
Method for double doping sources and drains in an EPROM |
Alexander H. Owens, Wing K. Huie, David S. Pan |
1986-05-27 |
| 4574467 |
N- well CMOS process on a P substrate with double field guard rings and a PMOS buried channel |
David S. Pan, Wing K. Huie |
1986-03-11 |
| 4385947 |
Method for fabricating CMOS in P substrate with single guard ring using local oxidation |
David S. Pan |
1983-05-31 |
