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Method and apparatus for detecting clock gating opportunities in a pipelined electronic circuit design |
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Structure for testing an operation of integrated circuitry |
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Testing an operation of integrated circuitry |
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2011-08-23 |
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Accelerating test, debug and failure analysis of a multiprocessor device |
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Using eFuses to store PLL configuration data |
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2010-03-30 |
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Method and apparatus for detecting frequency lock in a system including a frequency synthesizer |
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Information handling system capable of detecting frequency lock of signals downstream from a signal synthesized by frequency synthesizer |
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2009-07-14 |