| D422251 |
Combined truck hood and fenders |
Bryan W. Delashaw, John F. Myers, Eric Norman Tucker |
2000-04-04 |
| 5802586 |
Cache memory having a read-modify-write operation and simultaneous burst read and write operations and a method therefor |
Kenneth W. Jones, Arthur David Kahlich |
1998-09-01 |
| 5473561 |
BICMOS cache TAG having ECL reduction circuit with CMOS output |
Kenneth W. Jones, Ketan B. Shah |
1995-12-05 |
| 5448523 |
BICMOS cache TAG having small signal exclusive OR for TAG comparison |
James C. Lewis |
1995-09-05 |
| 5394026 |
Substrate bias generating circuit |
Ruey I. Yu |
1995-02-28 |
| 5268863 |
Memory having a write enable controlled word line |
Kenneth W. Jones, Karl L. Wang, Ray L. Chang |
1993-12-07 |
| 5043945 |
Memory with improved bit line and write data line equalization |
— |
1991-08-27 |
| 4972374 |
Output amplifying stage with power saving feature |
Karl L. Wang |
1990-11-20 |
| 4764900 |
High speed write technique for a memory |
Karl L. Wang |
1988-08-16 |
| 4751680 |
Bit line equalization in a memory |
Karl L. Wang, Peter Voss |
1988-06-14 |
| 4689771 |
Memory with improved write mode to read mode transition |
Karl L. Wang |
1987-08-25 |
