Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6998878 | Semiconductor integrated circuit and semiconductor logic circuit used in the integrated circuit | Kazuo Kanetani, Hiroaki Nambu, Kaname Yamasaki, Takeshi Kusunoki, Keiichi Higeta +1 more | 2006-02-14 |
| 6677782 | Semiconductor integrated circuit and semiconductor logic circuit used in the integrated circuit | Kazuo Kanetani, Hiroaki Nambu, Kaname Yamasaki, Takeshi Kusunoki, Keiichi Higeta +1 more | 2004-01-13 |
| 6369617 | Semiconductor integrated circuit and semiconductor logic circuit used in the integrated circuit | Kazuo Kanetani, Hiroaki Nambu, Kaname Yamasaki, Takeshi Kusunoki, Keiichi Higeta +1 more | 2002-04-09 |
| 6034912 | Semiconductor integrated circuit device and method of manufacturing the same | Satoru Isomura, Atsushi Shimizu, Keiichi Higeta, Tohru Kobayashi, Takeo Yamada +2 more | 2000-03-07 |
| 5898636 | Semiconductor integrated circuit device with interleaved memory and logic blocks | Satoru Isomura, Atsushi Shimizu, Keiichi Higeta, Tohru Kobayashi, Takeo Yamada +2 more | 1999-04-27 |
| 5644548 | Dynamic random access memory having bipolar and C-MOS transistor | Goro Kitsukawa, Takao Watanabe, Ryoichi Hori, Noriyuki Honma, Kiyoo Ito +2 more | 1997-07-01 |
| 5587952 | Dynamic random access memory including read preamplifiers activated before rewrite amplifiers | Goro Kitsukawa, Takao Watanabe, Ryoichi Hori, Noriyuki Honma, Kiyoo Itoh | 1996-12-24 |
| 5583817 | Semiconductor integrated circuit device | Etsuko Kawaguchi, Keiichi Higeta, Yasuhiro Fujimura | 1996-12-10 |
| 5523966 | Memory cell and a memory device having reduced soft error | Youji Idei, Hiroaki Nambu, Kazuo Kanetani, Toru Masuda, Kenichi Ohhata +1 more | 1996-06-04 |
| 5398201 | Bit-line drive circuit for a semiconductor memory | Hiroaki Nambu, Noriyuki Homma, Hisayuki Higuchi, Kazuo Kanetani, Youji Idei +4 more | 1995-03-14 |
| 5255225 | Semiconductor integrated circuit device and memory consisting of semiconductor integrated circuit | Hiroaki Nambu, Noriyuki Homma, Kazuo Kanetani, Hisayuki Higuchi, Youji Idei +8 more | 1993-10-19 |
| 5163022 | Semiconductor cell memory with current sensing | Noriyuki Homma, Hiroaki Nambu, Tohru Nakamura, Youji Idei, Kazuo Kanetani +3 more | 1992-11-10 |
| 5086414 | Semiconductor device having latch means | Hiroaki Nambu, Noriyuki Homma, Kazuo Kanetani, Youji Idei, Kenichi Ohhata +2 more | 1992-02-04 |
| 4865823 | Method for recovering gallium | Yukinori Minagawa, Minoru Tanaka, Kazumasa Arai, Gouichi Muramatsu | 1989-09-12 |
| 4809052 | Semiconductor memory device | Yasushiro Nishioka, Takeo Shiba, Hiroshi Shinriki, Kiichiro Mukai, Akihisa Uchida +4 more | 1989-02-28 |
| 4733372 | Semiconductor memory having redundancy | Hiroaki Nanbu, Noriyuki Honma, Kazuo Kanetani, Motoaki Matumoto, Kazuhiko Tani +1 more | 1988-03-22 |
| 4727265 | Semiconductor circuit having a current switch circuit which imparts a latch function to an input buffer for generating high amplitude signals | Hiroaki Nanbu, Noriyuki Honma, Kazuo Kanetani, Goro Kitsukawa | 1988-02-23 |
| 4642486 | Decoder circuit using transistors or diodes of different characteristics | Noriyuki Honma, Hiroaki Nambu, Isao Yoshida, Hisayuki Higuchi | 1987-02-10 |
| 4461992 | Temperature-compensated current source circuit and a reference voltage generating circuit using the same | Noriyuki Homma | 1984-07-24 |
| 4366558 | Memory device with fast word-line-discharging-circuits | Noriyuki Homma | 1982-12-28 |
| 4201747 | Method of separating yttrium ions | Yukinori Minagawa, Tsugio Kaneko | 1980-05-06 |