Issued Patents All Time
Showing 25 most recent of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12373329 | Deterministic replay of a multi-threaded trace on a multi-threaded processor | — | 2025-07-29 |
| 12147809 | Methods and apparatus to insert profiling instructions into a graphics processing unit kernel | Orr Goldman | 2024-11-19 |
| 12106112 | Methods and apparatus to generate graphics processing unit long instruction traces | — | 2024-10-01 |
| 11775304 | Methods and apparatus to insert profiling instructions into a graphics processing unit kernel | Orr Goldman | 2023-10-03 |
| 11694299 | Methods and apparatus to emulate graphics processing unit instructions | Michael Berezalsky, Noam Itzhaki, Arik Narkis, Orr Goldman | 2023-07-04 |
| 11650902 | Methods and apparatus to perform instruction-level graphics processing unit (GPU) profiling based on binary instrumentation | Aleksey Alekseev, Michael Berezalsky, Sion Berkowits, Julia Fedorova, Anton V. Gorshkov +3 more | 2023-05-16 |
| 11461954 | Dynamic constant update mechanism | Michael Apodaca, John H. Feit, David M. Cimini, Thomas Raoux | 2022-10-04 |
| 11132761 | Methods and apparatus to emulate graphics processing unit instructions | Michael Berezalsky, Noam Itzhaki, Arik Narkis, Orr Goldman | 2021-09-28 |
| 11120521 | Techniques for graphics processing unit profiling using binary instrumentation | Orr Goldman, Michael Berezalsky, Noam Itzhaki, Arik Narkis | 2021-09-14 |
| 11093366 | Generating different traces for graphics processor code | — | 2021-08-17 |
| 11048514 | Methods and apparatus to insert profiling instructions into a graphics processing unit kernel | Orr Goldman | 2021-06-29 |
| 10997772 | Dynamic constant update mechanism | Michael Apodaca, John H. Feit, David M. Cimini, Thomas Raoux | 2021-05-04 |
| 10949330 | Binary instrumentation to trace graphics processor code | — | 2021-03-16 |
| 10922779 | Techniques for multi-mode graphics processing unit profiling | Orr Goldman, Michael Berezalsky, Noam Itzhaki, Arik Narkis | 2021-02-16 |
| 10867362 | Methods and apparatus to improve operation of a graphics processing unit | Michael Berezalsky, Noam Itzhaki, Arik Narkis, Orr Goldman | 2020-12-15 |
| 10705846 | Methods and apparatus to insert profiling instructions into a graphics processing unit kernel | Orr Goldman | 2020-07-07 |
| 10559057 | Methods and apparatus to emulate graphics processing unit instructions | Michael Berezalsky, Noam Itzhaki, Arik Narkis, Orr Goldman | 2020-02-11 |
| 10504492 | Apparatus and methods for generating dynamic trace data on a GPU | Sunpyo Hong, Michael Berezalsky, Arik Narkis, Noam Itzhaki | 2019-12-10 |
| 10467118 | Techniques for performance analysis of processor instruction execution | Michael Berezalsky, Noam Itzhaki, Arik Narkis | 2019-11-05 |
| 10209764 | Apparatus and method for improving power-performance using a software analysis routine | Gadi Haber | 2019-02-19 |
| 9552207 | Method and apparatus for performance efficient ISA virtualization using dynamic partial binary translation | Gadi Haber, Esfir Natanzon, Boris Ginzburg, Aya Elhanan, Moshe Maury Bach +1 more | 2017-01-24 |
| 9348594 | Core switching acceleration in asymmetric multiprocessor system | Koichi Yamada, Boris Ginzburg, Wei Li, Ronny Ronen, Esfir Natanzon +4 more | 2016-05-24 |
| 9329974 | Technologies for determining binary loop trip count using dynamic binary instrumentation | Igor Breger | 2016-05-03 |
| 9250906 | Method and apparatus for performance efficient ISA virtualization using dynamic partial binary translation | Gadi Haber, Esfir Natanzon, Boris Ginzburg, Aya Elhanan, Moshe Maury Bach +1 more | 2016-02-02 |
| 9141361 | Method and apparatus for performance efficient ISA virtualization using dynamic partial binary translation | Gadi Haber, Esfir Natanzon, Boris Ginzburg, Aya Elhanan, Moshe Maury Bach +1 more | 2015-09-22 |