Issued Patents All Time
Showing 101–124 of 124 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7218552 | Last-first mode and method for programming of non-volatile memory with reduced program disturb | Jun Wan | 2007-05-15 |
| 7215575 | Detecting over programmed memory | Jian Chen, Yan Li | 2007-05-08 |
| 7206235 | Apparatus for controlled programming of non-volatile memory exhibiting bit line coupling | Yan Li, Siu Lung Chan | 2007-04-17 |
| 7206231 | System for programming non-volatile memory with self-adjusting maximum program loop | Jun Wan | 2007-04-17 |
| 7183153 | Method of manufacturing self aligned non-volatile memory cells | Tuan Pham, Masaaki Higashitani | 2007-02-27 |
| 7177199 | Behavior based programming of non-volatile memory | Jian Chen, Yan Li, Daniel C. Guterman, Tomoharu Tanaka | 2007-02-13 |
| 7170788 | Last-first mode and apparatus for programming of non-volatile memory with reduced program disturb | Jun Wan | 2007-01-30 |
| 7154779 | Non-volatile memory cell using high-k material inter-gate programming | Nima Mokhlesi | 2006-12-26 |
| 7105406 | Self aligned non-volatile memory cell and process for fabrication | Tuan Pham, Henry Chien, George Matamis | 2006-09-12 |
| 7064034 | Technique for fabricating logic elements using multiple gate layers | Nima Mokhlesi | 2006-06-20 |
| 7057931 | Flash memory programming using gate induced junction leakage current | Chan-Sui Pang | 2006-06-06 |
| 7049652 | Pillar cell flash memory technology | Nima Mokhlesi | 2006-05-23 |
| 7046555 | Methods for identifying non-volatile memory elements with poor subthreshold slope or weak transconductance | Jian Chen, Yan Li, Kazunori Kanebako, Tomoharu Tanaka | 2006-05-16 |
| 7023737 | System for programming non-volatile memory with self-adjusting maximum program loop | Jun Wan | 2006-04-04 |
| 7009889 | Comprehensive erase verification for non-volatile memory | Dat Tran, Kiran Ponnuru, Jian Chen, Jun Wan | 2006-03-07 |
| 6975537 | Source side self boosting technique for non-volatile memory | Jian Chen, Yan Li, Masaaki Higashitani | 2005-12-13 |
| 6917542 | Detecting over programmed memory | Jian Chen, Yan Li | 2005-07-12 |
| 6914823 | Detecting over programmed memory after further programming | Jian Chen, Yan Li | 2005-07-05 |
| 6859397 | Source side self boosting technique for non-volatile memory | Jian Chen, Yan Li, Masaaki Higashitani | 2005-02-22 |
| 6492695 | Semiconductor arrangement with transistor gate insulator | — | 2002-12-10 |
| 6448122 | Method and device structure for enhanced ESD performance | Emmanuel de Muizon | 2002-09-10 |
| 6262455 | Method of forming dual gate oxide layers of varying thickness on a single substrate | Emmanuel de Muizon | 2001-07-17 |
| 5736435 | Process for fabricating a fully self-aligned soi mosfet | Suresh Venkatesan, Stephen S. Poon, Sergio A. Ajuria | 1998-04-07 |
| 5627097 | Method for making CMOS device having reduced parasitic capacitance | Suresh Venkatesan, Stephen S. Poon | 1997-05-06 |