Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5716888 | Stress released VLSI structure by void formation | Water Lur, Jenn-Tarng Lin | 1998-02-10 |
| 5413963 | Method for depositing an insulating interlayer in a semiconductor metallurgy system | Po-Wen Yen, Army Chung | 1995-05-09 |