| 6195676 |
Method and apparatus for user side scheduling in a multiprocessor operating system program that implements distributive scheduling of processes |
Diane M. Wengelski, Stuart Hawkinson, Mark D. Johnson, Jeremiah D. Burke, Keith J. Thompson +16 more |
2001-02-27 |
| 5745721 |
Partitioned addressing apparatus for vector/scalar registers |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1998-04-28 |
| 5717881 |
Data processing system for processing one and two parcel instructions |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1998-02-10 |
| 5706490 |
Method of processing conditional branch instructions in scalar/vector processor |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1998-01-06 |
| 5659706 |
Vector/scalar processor with simultaneous processing and instruction cache filling |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1997-08-19 |
| 5640524 |
Method and apparatus for chaining vector instructions |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1997-06-17 |
| 5623650 |
Method of processing a sequence of conditional vector IF statements |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1997-04-22 |
| 5598547 |
Vector processor having functional unit paths of differing pipeline lengths |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1997-01-28 |
| 5561784 |
Interleaved memory access system having variable-sized segments logical address spaces and means for dividing/mapping physical address into higher and lower order addresses |
Steve S. Chen, Frederick J. Simmons, Jimmie R. Wilson, Edward C. Miller, Roger E. Eckert +1 more |
1996-10-01 |
| 5544337 |
Vector processor having registers for control by vector resisters |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1996-08-06 |
| 5524255 |
Method and apparatus for accessing global registers in a multiprocessor system |
Douglas R. Beard, Edward C. Miller, Robert E. Strout, II, Anthony R. Schooler, Alexander A. Silbey +4 more |
1996-06-04 |
| 5499356 |
Method and apparatus for a multiprocessor resource lockout instruction |
Roger E. Eckert, Richard E. Hessel, Andrew Everett Phelps, Jimmie R. Wilson |
1996-03-12 |
| 5452452 |
System having integrated dispatcher for self scheduling processors to execute multiple types of processes |
Gregory G. Gaetner, Diane M. Wengelski, Keith J. Thompson |
1995-09-19 |
| 5430884 |
Scalar/vector processor |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1995-07-04 |
| 5428803 |
Method and apparatus for a unified parallel processing architecture |
Steve S. Chen, Douglas R. Beard, Edward C. Priest, John Wastlick, James M. VanDyke |
1995-06-27 |
| 5388217 |
Distributing system for multi-processor input and output using channel adapters |
Gary E. Benzschawel, Lonnie R. Heidtke, Steven S. Chen, Fredrich J. Simmons |
1995-02-07 |
| 5339415 |
Dual level scheduling of processes to multiple parallel regions of a multi-threaded program on a tightly coupled multiprocessor computer system |
Robert E. Strout, II, Jon A. Masamitsu, David M. Cox, Gregory G. Gaertner, Diane M. Wengelski +1 more |
1994-08-16 |
| 5253359 |
Control and maintenance subsystem network for use with a multiprocessor computer system |
Glen L. Collier, G. Joseph Throop, David L. Clounch, Cris J. Rhea, Douglas R. Beard |
1993-10-12 |
| 5239629 |
Dedicated centralized signaling mechanism for selectively signaling devices in a multiprocessor system |
Edward C. Miller, Anthony R. Schooler, Douglas R. Beard, Alexander A. Silbey, Andrew Everett Phelps |
1993-08-24 |
| 5202988 |
System for communicating among processors having different speeds |
Gregory G. Gaertner, Diane M. Wengelski, Keith J. Thompson |
1993-04-13 |
| 5197130 |
Cluster architecture for a highly parallel scalar/vector multiprocessor system |
Steve S. Chen, Frederick J. Simmons, Jimmie R. Wilson, Edward C. Miller, Roger E. Eckert +1 more |
1993-03-23 |
| 5193187 |
Fast interrupt mechanism for interrupting processors in parallel in a multiprocessor system wherein processors are assigned process ID numbers |
Robert E. Strout, II, Edward C. Miller, Anthony R. Schooler, Alexander A. Silbey, Andrew Everett Phelps +2 more |
1993-03-09 |
| 5179702 |
System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling |
Diane M. Wengelski, Stuart Hawkinson, Mark D. Johnson, Jeremiah D. Burke, Keith J. Thompson +16 more |
1993-01-12 |
| 5168547 |
Distributed architecture for input/output for a multiprocessor system |
Edward C. Miller, Steve S. Chen, Frederick J. Simmons, Leonard S. Veil, Mark J. Vogel +1 more |
1992-12-01 |
| 5165038 |
Global registers for a multiprocessor system |
Douglas R. Beard, Edward C. Miller, Robert E. Strout, II, Anthony R. Schooler, Alexander A. Silbey +4 more |
1992-11-17 |