Issued Patents All Time
Showing 25 most recent of 64 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12393341 | Bank to bank data transfer | Thanh K. Mai, Daniel B. Penney | 2025-08-19 |
| 12297098 | Systems and methods for temperature sensor access in die stacks | — | 2025-05-13 |
| 12277963 | Apparatus with data-rate-based voltage control mechanism and methods for operating the same | Miles S. Wiscombe, James S. Rehmeyer, Eric J. Stave | 2025-04-15 |
| 12197264 | Power management for a memory device | James S. Rehmeyer, Miles S. Wiscombe, Eric J. Stave | 2025-01-14 |
| 12087394 | Synchronous input buffer control using a ripple counter | Brian W. Huber, Scott E. Smith | 2024-09-10 |
| 11934326 | Memory with improved command/address bus utilization | Debra M. Bell, Vaughn N. Johnson, Kyle Alexander, Brian T. Pecha, Miles S. Wiscombe | 2024-03-19 |
| 11915775 | Apparatuses and methods for bad row mode | Jack Riley, Scott E. Smith, Christian Mohr, Joshua E. Alzheimer, Yoshinori Fujiwara +2 more | 2024-02-27 |
| 11908509 | Apparatus with input signal quality feedback | John E. Riley, Scott E. Smith, Jennifer E. Taylor | 2024-02-20 |
| 11886715 | Memory array accessibility | Daniel B. Penney | 2024-01-30 |
| 11881245 | Apparatus with data-rate-based voltage control mechanism and methods for operating the same | Miles S. Wiscombe, James S. Rehmeyer, Eric J. Stave | 2024-01-23 |
| 11881251 | Row clear features for memory devices and associated methods and systems | Miles S. Wiscombe, Scott E. Smith, Brian W. Huber, Tony M. Brewer | 2024-01-23 |
| 11869592 | Apparatuses and methods for decoding addresses for memory | Scott E. Smith | 2024-01-09 |
| 11755206 | Bank to bank data transfer | Thanh K. Mai, Daniel B. Penney | 2023-09-12 |
| 11748035 | Command address input buffer bias current reduction | — | 2023-09-05 |
| 11670356 | Apparatuses and methods for refresh address masking | Yoshinori Fujiwara, Harish V. Gadamsetty, Dennis G. Montierth, Michael A. Shore, Jason Johnson | 2023-06-06 |
| 11646095 | Configurable soft post-package repair (SPPR) schemes | John E. Riley | 2023-05-09 |
| 11545199 | Methods for on-die memory termination and memory devices and systems employing the same | Eric J. Stave, Thomas H. Kinsley, Matthew A. Prather | 2023-01-03 |
| 11513945 | Apparatuses and methods for transferring data using a cache | Daniel B. Penney | 2022-11-29 |
| 11482265 | Write leveling | Daniel B. Penney | 2022-10-25 |
| 11462254 | Apparatus with data-rate-based voltage control mechanism and methods for operating the same | Miles S. Wiscombe, James S. Rehmeyer, Eric J. Stave | 2022-10-04 |
| 11430504 | Row clear features for memory devices and associated methods and systems | Miles S. Wiscombe, Scott E. Smith, Brian W. Huber, Tony M. Brewer | 2022-08-30 |
| 11417374 | Reset speed modulation circuitry for a decision feedback equalizer of a memory device | William C. Waldrop | 2022-08-16 |
| 11409674 | Memory with improved command/address bus utilization | Debra M. Bell, Vaughn N. Johnson, Kyle Alexander, Brian T. Pecha, Miles S. Wiscombe | 2022-08-09 |
| 11275650 | Systems and methods for performing a write pattern in memory devices | — | 2022-03-15 |
| 11182085 | Memory array accessibility | Daniel B. Penney | 2021-11-23 |