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Apparatus with data-rate-based voltage control mechanism and methods for operating the same |
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Power management for a memory device |
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Memory with programmable refresh order and stagger time |
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| 11934326 |
Memory with improved command/address bus utilization |
Debra M. Bell, Vaughn N. Johnson, Kyle Alexander, Gary L. Howe, Brian T. Pecha |
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| 11881245 |
Apparatus with data-rate-based voltage control mechanism and methods for operating the same |
Gary L. Howe, James S. Rehmeyer, Eric J. Stave |
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| 11881251 |
Row clear features for memory devices and associated methods and systems |
Scott E. Smith, Gary L. Howe, Brian W. Huber, Tony M. Brewer |
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| 11568913 |
Voltage adjustment based on pending refresh operations |
Timothy M. Hollis, James S. Rehmeyer, Baekkyu Choi, Yogesh Sharma, Eric J. Stave +1 more |
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| 11468938 |
Memory with programmable refresh order and stagger time |
Vaughn N. Johnson, Debra M. Bell, Brian T. Pecha, Kyle Alexander |
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| 11468939 |
Conditional row activation and access during refresh for memory devices and associated methods and systems |
Debra M. Bell, Brian T. Pecha, Vaughn N. Johnson, Kyle Alexander |
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| 11462254 |
Apparatus with data-rate-based voltage control mechanism and methods for operating the same |
Gary L. Howe, James S. Rehmeyer, Eric J. Stave |
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| 11430504 |
Row clear features for memory devices and associated methods and systems |
Scott E. Smith, Gary L. Howe, Brian W. Huber, Tony M. Brewer |
2022-08-30 |
| 11409674 |
Memory with improved command/address bus utilization |
Debra M. Bell, Vaughn N. Johnson, Kyle Alexander, Gary L. Howe, Brian T. Pecha |
2022-08-09 |
