Issued Patents All Time
Showing 51–73 of 73 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5270254 | Integrated circuit metallization with zero contact enclosure requirements and method of making the same | Fusen Chen | 1993-12-14 |
| 5268325 | Method for fabricating a polycrystalline silicon resistive load element in an integrated circuit | Charles R. Spinner, III | 1993-12-07 |
| 5256895 | Pad oxide protect sealed interface isolation | Frank R. Bryant, Yu-Pin Han | 1993-10-26 |
| 5246883 | Semiconductor contact via structure and method | Yih-Shung Lin, Lun-Tseng Lu, Che-Chia Wei, John L. Walters | 1993-09-21 |
| 5234852 | Sloped spacer for MOS field effect devices comprising reflowable glass layer | — | 1993-08-10 |
| 5162884 | Insulated gate field-effect transistor with gate-drain overlap and method of making the same | Frank F. Bryant | 1992-11-10 |
| 5146309 | Method for forming polycrystalline silicon contacts | Charles R. Spinner, III, Fusen Chen | 1992-09-08 |
| 5130268 | Method for forming planarized shallow trench isolation in an integrated circuit and a structure formed thereby | Fusen Chen | 1992-07-14 |
| 5124280 | Local interconnect for integrated circuits | Che-Chia Wei | 1992-06-23 |
| 5108951 | Method for forming a metal contact | Fusen Chen, Yih-Shung Lin, Girish Dixit, Che-Chia Wei | 1992-04-28 |
| 5075761 | Local interconnect for integrated circuits | Yih-Shung Lin, Fusen Chen | 1991-12-24 |
| 5070391 | Semiconductor contact via structure and method | Charles R. Spinner, III | 1991-12-03 |
| 5068201 | Method for forming a high valued resistive load element and low resistance interconnect for integrated circuits | Charles R. Spinner, III | 1991-11-26 |
| 5059554 | Method for forming polycrystalline silicon contacts | Charles R. Spinner, III, Fusen F. Chen | 1991-10-22 |
| 5057463 | Thin oxide structure and method | Frank R. Bryant | 1991-10-15 |
| 4981813 | Pad oxide protect sealed interface isolation process | Frank R. Bryant, Yu-Pin Han, Tsiu C. Chan | 1991-01-01 |
| 4978637 | Local interconnect process for integrated circuits | Yih-Shung Lin, Fusen Chen | 1990-12-18 |
| 4962414 | Method for forming a contact VIA | Robert O. Miller, Mohammed M. Farohani, Yu-Pin Han | 1990-10-09 |
| 4933304 | Method for reducing the surface reflectance of a metal layer during semiconductor processing | Fusen Chen, Yih-Shung Lin | 1990-06-12 |
| 4886764 | Process for making refractory metal silicide cap for protecting multi-layer polycide structure | Robert O. Miller | 1989-12-12 |
| 4863562 | Method for forming a non-planar structure on the surface of a semiconductor substrate | Frank R. Bryant | 1989-09-05 |
| 4802054 | Input protection for an integrated circuit | Ruey J. Yu | 1989-01-31 |
| 4771014 | Process for manufacturing LDD CMOS devices | Yu-Pin Han, Frank R. Bryant | 1988-09-13 |