Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6963882 | Method and apparatus for processing a list structure | David A. Elko, Richard Dievendorff, Dermot Flaherty, Jeffrey M. Nick, David H. Surman +1 more | 2005-11-08 |
| 6862595 | Method and apparatus for implementing a shared message queue using a list structure | David A. Elko, Richard Dievendorff, Dermot Flaherty, Jeffrey M. Nick, David H. Surman +1 more | 2005-03-01 |
| 6859866 | Synchronizing processing of commands invoked against duplexed coupling facility structures | Dennis J. Dahlen, Steven N. Goss, Steven B. Jones, Michael J. Jordan, Georgette L. Kurdt +3 more | 2005-02-22 |
| 6615373 | Method, system and program products for resolving potential deadlocks | David A. Elko, Steven N. Goss, Michael J. Jordan, Jeffrey M. Nick, Wendell W. Wilkinson | 2003-09-02 |
| 6609214 | Method, system and program products for copying coupling facility structures | Dennis J. Dahlen, David A. Elko, Jeffrey M. Nick, David H. Surman, Wendell W. Wilkinson +2 more | 2003-08-19 |
| 6546414 | Method, system and program products for copying coupling facility lock structures | Dennis J. Dahlen, David A. Elko, Jeffrey M. Nick, David H. Surman, Ruth A. Allen +1 more | 2003-04-08 |
| 6542970 | Method, system and program products for copying coupling facility list structures | Dennis J. Dahlen, David A. Elko, Jeffrey M. Nick, David H. Surman, Ruth A. Allen +1 more | 2003-04-01 |
| 6233644 | System of performing parallel cleanup of segments of a lock structure located within a coupling facility | Dennis J. Dahlen, Jeffrey M. Nick, David H. Surman | 2001-05-15 |
| 6185562 | Performing parallel cleanup of segments of a lock structure | Dennis J. Dahlen, Jeffrey M. Nick, David H. Surman | 2001-02-06 |
| 6178421 | Method of performing parallel cleanup of segments of a lock structure | Dennis J. Dahlen, Jeffrey M. Nick, David H. Surman | 2001-01-23 |
| 6075937 | Preprocessing of stored target routines for controlling emulation of incompatible instructions on a target processor and utilizing target processor feedback for controlling non-sequential incompatible instruction emulation | Casper A. Scalzi, Eric M. Schwarz, William J. Starke, James R. Urquhart | 2000-06-13 |
| 6009261 | Preprocessing of stored target routines for emulating incompatible instructions on a target processor | Casper A. Scalzi, Eric M. Schwarz, William J. Starke, James R. Urquhart | 1999-12-28 |
| 5680575 | Interconnect failure detection and cache reset apparatus | Neil G. Bartow, Robert S. Capowski, Louis T. Fasano, Thomas A. Gregg, Gregory Salyer | 1997-10-21 |
| 5574938 | Allowed operational-link transceiver table verifies the operational status of transceivers in a multiple conductor data transmission link | Neil G. Bartow, Steven N. Goss | 1996-11-12 |
| 5548623 | Null words for pacing serial links to driver and receiver speeds | Daniel F. Casper, Thomas A. Gregg, Gregory Salyer | 1996-08-20 |
| 5509122 | Configurable, recoverable parallel bus | Neil G. Bartow, Robert S. Capowski, Louis T. Fasano, Thomas A. Gregg, Gregory Salyer | 1996-04-16 |
| 5481738 | Apparatus and method for communicating a quiesce and unquiesce state between elements of a data processing complex | Neil G. Bartow, Steven N. Goss | 1996-01-02 |
| 5455830 | Error detection and recovery in parallel/serial buses | Thomas A. Gregg, Gregory Salyer | 1995-10-03 |
| 5418939 | Concurrent maintenance of degraded parallel/serial buses | Kenneth J. Fredericks, Thomas A. Gregg, Paul W. Jones, Gregory Salyer, Patrick J. Sugrue | 1995-05-23 |
| 5412803 | Communications system having plurality of originator and corresponding recipient buffers with each buffer having three different logical areas for transmitting messages in single transfer | Neil G. Bartow, Paul J. Brown, Robert S. Capowski, Louis T. Fasano, Thomas A. Gregg +1 more | 1995-05-02 |
| 5357608 | Configurable, recoverable parallel bus | Neil G. Bartow, Robert S. Capowski, Louis T. Fasano, Thomas A. Gregg, Gregory Salyer | 1994-10-18 |
| 5267240 | Frame-group transmission and reception for parallel/serial buses | Neil G. Bartow, Paul J. Brown, Robert S. Capowski, Louis T. Fasano, Thomas A. Gregg +3 more | 1993-11-30 |
| 5151981 | Instruction sampling instrumentation | Valerie White | 1992-09-29 |
| 4570082 | Single clocked latch circuit | Gerald A. Maley | 1986-02-11 |
| 4564772 | Latching circuit speed-up technique | Gerald A. Maley | 1986-01-14 |