DD

Dhruv Dua

CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
📍 Noida, IN: #370 of 795 inventorsTop 50%
Overall (All Time): #2,769,579 of 4,157,543Top 70%
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Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10528689 Verification process for IJTAG based test pattern migration Rajesh Khurana, Vivek Chickermane, Krishna Vijaya Chakravadhanula 2020-01-07