Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12154652 | Dynamic random access memory applied to an embedded display port | Yen-An Chang, Wei-Ming Huang | 2024-11-26 |
| 11894098 | Dynamic random access memory applied to an embedded display port | Yen-An Chang, Wei-Ming Huang | 2024-02-06 |
| 10998017 | Dynamic random access memory applied to an embedded display port | Yen-An Chang, Wei-Ming Huang | 2021-05-04 |
| 10634713 | Method for testing semiconductor die pad untouched by probe and related test circuit | — | 2020-04-28 |
| 9310816 | Immediate response low dropout regulation system and operation method of a low dropout regulation system | Yen-An Chang, Kuang-Fu Teng | 2016-04-12 |
| 9019776 | Memory access circuit for double data/single data rate applications | Chih-Huei Hu, Chia-Wei Chang | 2015-04-28 |
| 8432206 | Delay lock loop system with a self-tracking function and method thereof | Kuang-Fu Teng, Chun Shiah, Feng-Chia Chang | 2013-04-30 |
| 8345500 | Memory having a disabling circuit and method for disabling the memory | Shih-Hsing Wang | 2013-01-01 |
| 8284628 | Voltage regulator for memory | Chun-Ching Hsia, Yen-An Chang | 2012-10-09 |
| 8228751 | Method of reducing current of memory in self-refreshing mode and related memory | — | 2012-07-24 |
| 8169228 | Chip testing circuit | Yi-Hao Chang, Peng Chen | 2012-05-01 |
| 8154940 | Method of reducing current of memory in self-refreshing mode and related memory | — | 2012-04-10 |
| 8125838 | System in package integrated circuit with self-generating reference voltage | Shih-Hsing Wang | 2012-02-28 |
| 7983102 | Data detecting apparatus and methods thereof | Shih-Hsing Wang, Bor-Doou Rong, Chun Shiah | 2011-07-19 |
| 7978525 | Data flow scheme for low power DRAM | Shih-Hsing Wang | 2011-07-12 |
| 7940588 | Chip testing circuit | Ming-Cheng Liang, Kuo-Hua Lee | 2011-05-10 |
| 7924641 | Data flow scheme for low power DRAM | Shih-Hsing Wang | 2011-04-12 |
| 7843754 | Method of reducing current of memory in self-refreshing mode and related memory | — | 2010-11-30 |
| 7663949 | Memory row architecture having memory row redundancy repair function | Shih-Hsing Wang | 2010-02-16 |
| 7576597 | Electronic device and related method for performing compensation operation on electronic element | Yen-An Chang | 2009-08-18 |
| 7370250 | Test patterns to insure read signal integrity for high speed DDR DRAM | — | 2008-05-06 |
| 7359265 | Data flow scheme for low power DRAM | Shih-Hsing Wang | 2008-04-15 |
| 7277315 | Multiple power supplies for the driving circuit of local word line driver of DRAM | Jen-Shou Hsu, Yao Yi Liu | 2007-10-02 |
| 7184341 | Method of data flow control for a high speed memory | Chiun-Chi Shen | 2007-02-27 |
| 6934899 | Variable self-time scheme for write recovery by low speed tester | Bor-Doou Rong | 2005-08-23 |