Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9503091 | Wordline decoder circuits for embedded charge trap multi-time-programmable-read-only-memory | Toshiaki Kirihata, Ming Yin | 2016-11-22 |
| 9497027 | Encryption engine with twin cell memory array | Xiang Chen, Toshiaki Kirihata, Sami Rosenblatt | 2016-11-15 |
| 9436845 | Physically unclonable fuse using a NOR type memory array | Subramanian S. Iyer, Toshiaki Kirihata, Chandrasekharan Kothandaraman, Sami Rosenblatt | 2016-09-06 |
| 9418745 | Rebalancing in twin cell memory schemes to enable multiple writes | Xiang Chen, Toshiaki Kirihata, Dan Moy | 2016-08-16 |
| 9355739 | Bitline circuits for embedded charge trap multi-time-programmable-read-only-memory | Pamela Castalino, Toshiaki Kirihata | 2016-05-31 |
| 9025386 | Embedded charge trap multi-time-programmable-read-only-memory for high performance logic technology | Subramanian S. Iyer, Toshiaki Kirihata, Chandrasekharan Kothandaraman, Dan Moy | 2015-05-05 |
| 8872322 | Stacked chip module with integrated circuit chips having integratable built-in self-maintenance blocks | Kevin W. Gorman, Krishnendu Mondal, Saravanan Sethuraman | 2014-10-28 |
| 8120968 | High voltage word line driver | William Robert Reohr, John E. Barth, Jr., Toshiaki Kirihata, Donald W. Plass | 2012-02-21 |