Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12174780 | Synchronization in multi-chip systems | Michial Allen Gunter, Clifford L. Biffle, Charles Ross | 2024-12-24 |
| 12032511 | Synchronization in multi-chip systems | Michial Allen Gunter, Clifford L. Biffle, Charles Ross | 2024-07-09 |
| 11372801 | Synchronization in multi-chip systems | Michial Allen Gunter, Clifford L. Biffle, Charles Ross | 2022-06-28 |
| 9501506 | Indexing system | Marcus Fontoura, Daniel N. Meredith, Douglas Lee Taylor Rohde, Mahesh S. Palekar, Asim Shankar +2 more | 2016-11-22 |
| 9483568 | Indexing system | Marcus Fontoura, Daniel N. Meredith, Douglas Lee Taylor Rohde, Mahesh S. Palekar, Asim Shankar +2 more | 2016-11-01 |
| 8954905 | Methods for physical layout estimation | Hurley Song, Matthew Robert Rardon | 2015-02-10 |
| 8694931 | Systems and methods for super-threading of integrated circuit design programs | — | 2014-04-08 |
| 8560984 | Methods and systsm for physical layout estimation | Hurley Song, Matthew Robert Rardon | 2013-10-15 |
| 8386978 | Software and systems for physical layout estimation | Hurley Song, Matthew Robert Rardon | 2013-02-26 |
| 8375350 | Methods for reduced test case generation | Sascha Richter | 2013-02-12 |
| 8127260 | Physical layout estimator | Hurley Song, Matthew Robert Rardon | 2012-02-28 |
| 8065640 | Systems and methods for reduced test case generation | Sascha Richter | 2011-11-22 |
| 7913194 | Systems and methods for super-threading | — | 2011-03-22 |
| 6237127 | Static timing analysis of digital electronic circuits using non-default constraints known as exceptions | Ted L. Craven, Yael Rindenau | 2001-05-22 |