Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10354042 | Selectively reducing graph based analysis pessimism | Ritesh Shyamsukha, Chunyang Feng, Shankar Radhakrishnan | 2019-07-16 |
| 6237127 | Static timing analysis of digital electronic circuits using non-default constraints known as exceptions | Denis Baylor, Yael Rindenau | 2001-05-22 |