Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7880497 | Fault tolerant integrated circuit architecture | Steven Hennick Kelem, Jaime Cummins, John L. Watson, Robert Plunkett, Stephen L. Wasson +3 more | 2011-02-01 |
| 7812629 | Resilient integrated circuit architecture | Steven Hennick Kelem, Jaime Cummins, John L. Watson, Robert Plunkett, Stephen L. Wasson +3 more | 2010-10-12 |
| 7705624 | Fault tolerant integrated circuit architecture | Steven Hennick Kelem, Jaime Cummins, John L. Watson, Robert Plunkett, Stephen L. Wasson +3 more | 2010-04-27 |
| 7502920 | Hierarchical storage architecture for reconfigurable logic configurations | Dale Wong | 2009-03-10 |
| 6708325 | Method for compiling high level programming languages into embedded microprocessor with multiple reconfigurable logic | Laurence H. Cooke, Dale Wong | 2004-03-16 |
| 6389579 | Reconfigurable logic for table lookup | Dale Wong, Laurence H. Cooke | 2002-05-14 |
| 6349346 | Control fabric unit including associated configuration memory and PSOP state machine adapted to provide configuration address to reconfigurable functional unit | Shaila Hanrahan | 2002-02-19 |
| 6311200 | Reconfigurable program sum of products generator | Shaila Hanrahan | 2001-10-30 |
| 6298472 | Behavioral silicon construct architecture and mapping | Dale Wong, Karl W. Pfalzer | 2001-10-02 |
| 6288566 | Configuration state memory for functional blocks on a reconfigurable chip | Shaila Hanrahan | 2001-09-11 |
| 6282627 | Integrated processor and programmable data path chip for reconfigurable computing | Dale Wong, Laurence H. Cooke | 2001-08-28 |
| 6237074 | Tagged prefetch and instruction decoder for variable length instruction set and method of operation | Robert J. Divivier, Mario Nemirovsky | 2001-05-22 |
| 5970254 | Integrated processor and programmable data path chip for reconfigurable computing | Laurence H. Cooke, Dale Wong | 1999-10-19 |
| 5966534 | Method for compiling high level programming languages into an integrated processor with reconfigurable logic | Laurence H. Cooke, Dale Wong | 1999-10-12 |
| 5887002 | Preprogramming testing in a field programmable gate array | Laurence H. Cooke, William J. Allen | 1999-03-23 |
| 5815736 | Area and time efficient extraction circuit | Narendra Sankar | 1998-09-29 |
| 5699506 | Method and apparatus for fault testing a pipelined processor | Narendra Sankar | 1997-12-16 |
| 5671234 | Programmable input/output buffer circuit with test capability | Michael G. Ahrens, Joseph G. Nolan, III, Laurence H. Cooke | 1997-09-23 |
| 5652527 | Input-output circuit for increasing immunity to voltage spikes | Michael G. Ahrens, Joseph G. Nolan, III, Laurence H. Cooke | 1997-07-29 |
| 5649147 | Circuit for designating instruction pointers for use by a processor decoder | Mario Nemirovsky | 1997-07-15 |
| 5623501 | Preprogramming testing in a field programmable gate array | Laurence H. Cooke, William J. Allen | 1997-04-22 |
| 5617543 | Non-arithmetical circular buffer cell availability status indicator circuit | — | 1997-04-01 |
| 5598112 | Circuit for generating a demand-based gated clock | — | 1997-01-28 |
| 5546353 | Partitioned decode circuit for low power operation | Narendra Sankar | 1996-08-13 |
| 5534798 | Multiplexer with level shift capabilities | Michael G. Ahrens, Joseph G. Nolan, III, Laurence H. Cooke | 1996-07-09 |