Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11361819 | Staged bitline precharge | Andrew J. Robison, Michael Kevin Ciraula, Eric Busta | 2022-06-14 |
| 9916246 | Predictive multistage comparison for associative memory | Michael Kevin Ciraula, Gregg Donley, Alok Garg, Eric Busta | 2018-03-13 |
| 9405357 | Distribution of power gating controls for hierarchical power domains | Stephen V. Kosonocky, Christopher Spence Oliver, Sudha Thiruvengadam | 2016-08-02 |
| 8832508 | Apparatus and methods for testing writability and readability of memory cell arrays | Michael A. Dreesen | 2014-09-09 |
| 8533396 | Memory elements for performing an allocation operation and related methods | Michael Kevin Ciraula, Ryan T. Freese | 2013-09-10 |
| 8391432 | Data serializer | Daniel Alan Berkram | 2013-03-05 |
| 8385140 | Memory elements having shared selection signals | Michael A. Dreesen | 2013-02-26 |
| 8031819 | Systems and methods for synchronizing an input signal | Zhubiao Zhu, Daniel Alan Berkram | 2011-10-04 |
| 7856576 | Method and system for managing memory transactions for memory repair | Dan Robinson | 2010-12-21 |
| 7715251 | Memory access strobe configuration system and process | Christopher Wilson, Daniel Alan Berkram | 2010-05-11 |
| 7515667 | Method and apparatus for reducing synchronizer shadow | — | 2009-04-07 |
| 7127536 | Source-synchronous receiver having a predetermined data receive time | Gary Taylor | 2006-10-24 |
| 7019367 | Integrated circuit | Gary Taylor | 2006-03-28 |
| 6812750 | Divided clock generation | Gary Taylor | 2004-11-02 |