AT

Alok Tripathi

IN Intel: 6 patents #6,151 of 30,777Top 20%
SN Stmicroelectronics International N.V.: 5 patents #101 of 696Top 15%
CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
SS Stmicroelectronics Sa: 3 patents #1,424 of 4,662Top 35%
SS Stmicroelectronics (Crolles 2) Sas: 1 patents #308 of 529Top 60%
UA US Army: 1 patents #2,720 of 6,974Top 40%
Overall (All Time): #294,945 of 4,157,543Top 8%
16
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10637447 Low voltage, master-slave flip-flop Amit Verma, Anuj Grover, Deepak Kumar Bihani, Tanmoy Roy, Tanuj Agrawal 2020-04-28
10585143 Flip flop of a digital electronic chip Pascal Urard, Florian Cacho, Vincent Huard 2020-03-10
10277207 Low voltage, master-slave flip-flop Amit Verma, Anuj Grover, Deepak Kumar Bihani, Tanmoy Roy, Tanuj Agrawal 2019-04-30
10263603 Method for managing the operation of a synchronous retention flip-flop circuit exhibiting an ultra-low leakage current, and corresponding circuit Pascal Urard 2019-04-16
10153754 Method for managing the operation of a low-complexity synchronous retention flip-flop circuit, and corresponding circuit Amit Verma, Pascal Urard 2018-12-11
9785141 Method, system, and computer program product for schematic driven, unified thermal and electromagnetic interference compliance analyses for electronic circuit designs An-Yu Kuo, Bradley Brim, Taranjit Singh Kukal 2017-10-10
9401715 Conditional pulse generator circuit for low power pulse triggered flip flop Priyankar Mathuria 2016-07-26
8601422 Method and system for schematic-visualization driven topologically-equivalent layout design in RFSiP Abha Jain, Parag Choudhary, Utpal Bhattacharya 2013-12-03
7490309 Method and system for automatically optimizing physical implementation of an electronic circuit responsive to simulation analysis Taranjit Singh Kukal 2009-02-10
7402048 Technique for blind-mating daughtercard to mainboard Pascal Meier, Michael W. Leddige, Mohiuddin M. Mazumder, Mark B. Trobough, Ven Holalkere 2008-07-22
7391829 Apparatus, system and method for receiver equalization Ken Drottar, Dave Dunning 2008-06-24
7307492 Design, layout and method of manufacture for a circuit that taps a differential signal Dennis J. Miller 2007-12-11
6801043 Time domain reflectometry based transmitter equalization Ken Drottar 2004-10-05
6710266 Add-in card edge-finger design/stackup to optimize connector performance Jason A. Mix, Yun Ling, Kent E. Mallory 2004-03-23
6700455 Electromagnetic emission reduction technique for shielded connectors Dennis J. Miller 2004-03-02
5254210 Method and apparatus for growing semiconductor heterostructures Kenneth A. Jones, Joseph Flemish, Vladimir Sinisa Ban 1993-10-19