| 5745721 |
Partitioned addressing apparatus for vector/scalar registers |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1998-04-28 |
| 5717881 |
Data processing system for processing one and two parcel instructions |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1998-02-10 |
| 5706490 |
Method of processing conditional branch instructions in scalar/vector processor |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1998-01-06 |
| 5659706 |
Vector/scalar processor with simultaneous processing and instruction cache filling |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1997-08-19 |
| 5640524 |
Method and apparatus for chaining vector instructions |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1997-06-17 |
| 5623650 |
Method of processing a sequence of conditional vector IF statements |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1997-04-22 |
| 5598547 |
Vector processor having functional unit paths of differing pipeline lengths |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1997-01-28 |
| 5544337 |
Vector processor having registers for control by vector resisters |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1996-08-06 |
| 5524255 |
Method and apparatus for accessing global registers in a multiprocessor system |
Douglas R. Beard, George A. Spix, Edward C. Miller, Robert E. Strout, II, Anthony R. Schooler +4 more |
1996-06-04 |
| 5430884 |
Scalar/vector processor |
Douglas R. Beard, Andrew Everett Phelps, Michael A. Woodmansee, Richard G. Blewett, Jeffrey A. Lohman +3 more |
1995-07-04 |
| 5239629 |
Dedicated centralized signaling mechanism for selectively signaling devices in a multiprocessor system |
Edward C. Miller, George A. Spix, Anthony R. Schooler, Douglas R. Beard, Andrew Everett Phelps |
1993-08-24 |
| 5208914 |
Method and apparatus for non-sequential resource access |
Jimmie R. Wilson, Douglas R. Beard, Steve S. Chen, Roger E. Eckert, Richard E. Hessel +2 more |
1993-05-04 |
| 5193187 |
Fast interrupt mechanism for interrupting processors in parallel in a multiprocessor system wherein processors are assigned process ID numbers |
Robert E. Strout, II, George A. Spix, Edward C. Miller, Anthony R. Schooler, Andrew Everett Phelps +2 more |
1993-03-09 |
| 5165038 |
Global registers for a multiprocessor system |
Douglas R. Beard, George A. Spix, Edward C. Miller, Robert E. Strout, II, Anthony R. Schooler +4 more |
1992-11-17 |