Issued Patents All Time
Showing 76–84 of 84 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8407432 | Cache coherency sequencing implementation and adaptive LLC access priority control for CMP | Zhong-Ning Cai, Krishnakanth V. Sistla, Jeffrey D. Gilbert | 2013-03-26 |
| 8131940 | Methods and apparatuses to support memory transactions using partial physical addresses | Krishnakanth Sistia | 2012-03-06 |
| 8117478 | Optimizing power usage by processor cores based on architectural events | P Keong Or, Krishnakanth Sistia, Ganapati Srinivasa | 2012-02-14 |
| 7971074 | Method, system, and apparatus for a core activity detector to facilitate dynamic power management in a distributed system | Steven R. Hutsell, Krishnakanth V. Sistla | 2011-06-28 |
| 7827425 | Method and apparatus to dynamically adjust resource power usage in a distributed system | Steven R. Hutsell, Krishnakanth V. Sistla | 2010-11-02 |
| 7689778 | Preventing system snoop and cross-snoop conflicts | Krishnakanth V. Sistla, George Cai, Jeffrey D. Gilbert | 2010-03-30 |
| 7644293 | Method and apparatus for dynamically controlling power management in a distributed system | Krishnakanth V. Sistla, Steven R. Hutsell | 2010-01-05 |
| 7360008 | Enforcing global ordering through a caching bridge in a multicore multiprocessor system | Krishnakanth V. Sistla, Zhong-Ning Cai | 2008-04-15 |
| 7353338 | Credit mechanism for multiple banks of shared cache | Krishnakanth V. Sistla, George Cai, Ganapati Srinivasa, Geeyarpuram N. Santhanakrishnan | 2008-04-01 |