Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12373206 | Methods, systems, and apparatuses to optimize cross-lane packed data instruction implementation on a partial width processor with a minimal number of micro-operations | Kameswar Subramaniam, Eric Quintana | 2025-07-29 |
| 12039329 | Methods, systems, and apparatuses to optimize partial flag updating instructions via dynamic two-pass execution in a processor | Vikash Agarwal, Charles Vitu, Mihir Shah | 2024-07-16 |
| 9851976 | Instruction and logic for a matrix scheduler | James E. Phillips | 2017-12-26 |
| 9330022 | Power logic for memory address conversion | James E. Phillips, Charles Vitu | 2016-05-03 |
| 7783692 | Fast flag generation | Michael E. Tuuk, Teik-Chung Tan | 2010-08-24 |
| 7584237 | Fast hardware divider | Teik-Chung Tan, Michael E. Tuuk | 2009-09-01 |