Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12039329 | Methods, systems, and apparatuses to optimize partial flag updating instructions via dynamic two-pass execution in a processor | Wing Shek Wong, Vikash Agarwal, Mihir Shah | 2024-07-16 |
| 9330022 | Power logic for memory address conversion | James E. Phillips, Wing Shek Wong | 2016-05-03 |
| 7194604 | Address generation interlock resolution under runahead execution | Linda M. Bigelow, Richard Esten Bohn, Brian R. Prasky | 2007-03-20 |