Issued Patents All Time
Showing 26–50 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7698498 | Memory controller with bank sorting and scheduling | Dharmin Y. Parikh, Karthik Vaithianathan, Gary J. Lavelle, Atul Kwatra | 2010-04-13 |
| 7653069 | Two stage queue arbitration | Hugh Wilkinson | 2010-01-26 |
| 7536692 | Thread-based engine cache partitioning | Wilson Liao, Prashant R. Chandra, Jeen-Yuan Miin, Yim Pun | 2009-05-19 |
| 7525958 | Apparatus and method for two-stage packet classification using most specific filter matching and transport level sharing | Alok Kumar, Michael E. Kounavis, Raj Yavatkar, Prashant R. Chandra, Chen-Chi Kuo +1 more | 2009-04-28 |
| 7512729 | Method and apparatus for a high efficiency two-stage rotating priority arbiter with predictable arbitration latency | Bijoy Bose, Mark Rosenbluth, Irwin Vaz, Suri B. Medapati, Edwin O'Yang | 2009-03-31 |
| 7505410 | Method and apparatus to support efficient check-point and role-back operations for flow-controlled queues in network devices | Sanjeev Kumar Jain, Gilbert M. Wolrich, Hugh Wilkinson | 2009-03-17 |
| 7480781 | Apparatus and method to merge and align data from distributed memory controllers | Rohit Natarajan, Chen-Chi Kuo | 2009-01-20 |
| 7437510 | Instruction-assisted cache management for efficient use of cache and memory | Mark Rosenbluth | 2008-10-14 |
| 7426610 | On-device packet descriptor cache | Hugh Wilkinson | 2008-09-16 |
| 7412551 | Methods and apparatus for supporting programmable burst management schemes on pipelined buses | Bijoy Bose, Irwin Vaz, Mark Rosenbluth | 2008-08-12 |
| 7366865 | Enqueueing entries in a packet queue referencing packets | Sanjeev Kumar Jain, Gilbert M. Wolrich, Debra Bernstein | 2008-04-29 |
| 7360031 | Method and apparatus to enable I/O agents to perform atomic operations in shared, coherent memory spaces | Mason Cabot, Sameer Nanavati, Mark Rosenbluth | 2008-04-15 |
| 7340570 | Engine for comparing a key with rules having high and low values defining a range | Chang-Ming Lin, Subramanian Anand, Chen-Chi Kuo, Alok Kumar | 2008-03-04 |
| 7337371 | Method and apparatus to handle parity errors in flow control channels | Chen-Chi Kuo, Jeen-Yuan Miin, Raymond Ng | 2008-02-26 |
| 7324520 | Method and apparatus to process switch traffic | Lawrence B. Huston, III, Debra Bernstein, Hugh Wilkinson, Mark Rosenbluth | 2008-01-29 |
| 7313140 | Method and apparatus to assemble data segments into full packets for efficient packet-based classification | Charles E. Narad, Lawrence B. Huston, III, Yim Pun, Raymond Ng, Debra Bernstein +1 more | 2007-12-25 |
| 7308526 | Memory controller module having independent memory controllers for different memory types | Alpesh Oza, Rohit Verma | 2007-12-11 |
| 7275145 | Processing element with next and previous neighbor registers for direct data transfer | Prashant R. Chandra, Wilson Liao, Jeen-Yuan Miin, Pun Yim, Chen-Chi Kuo +1 more | 2007-09-25 |
| 7251219 | Method and apparatus to communicate flow control information in a duplex network processor system | Lawrence B. Huston, III, Yim Pun, Raymond Ng, Hugh Wilkinson, Mark Rosenbluth +1 more | 2007-07-31 |
| 7213099 | Method and apparatus utilizing non-uniformly distributed DRAM configurations and to detect in-range memory address matches | Chen-Chi Kuo, Rohit Natarajan, Kin-Yip Liu, Prashant R. Chandra, James D. Guilford | 2007-05-01 |
| 7210008 | Memory controller for padding and stripping data in response to read and write commands | Prashant R. Chandra, Chen-Chi Kuo, Rohit Natarajan, Mark Rosenbluth | 2007-04-24 |
| 7200699 | Scalable, two-stage round robin arbiter with re-circulation and bounded latency | Bijoy Bose, Mark Rosenbluth, Irwin Vaz, Alok Mathur | 2007-04-03 |
| 7185153 | Packet assembly | Prashant R. Chandra, Chen-Chi Kuo, Rohit Natarajan, Mark Rosenbluth | 2007-02-27 |
| 7158438 | Network packet buffer allocation optimization in memory bank systems | Chen-Chi Kuo, Senthil Arunachalam, Uday Naik | 2007-01-02 |
| 7103821 | Method and apparatus for improving network router line rate performance by an improved system for error checking | Charles E. Narad, Lawrence B. Huston, III, Yim Pun, Kin-Yip Liu | 2006-09-05 |