Issued Patents All Time
Showing 26–50 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6957332 | Managing a secure platform using a hierarchical executive architecture in isolated execution mode | Carl M. Ellison, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger +4 more | 2005-10-18 |
| 6941458 | Managing a secure platform using a hierarchical executive architecture in isolated execution mode | Carl M. Ellison, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger +4 more | 2005-09-06 |
| 6934817 | Controlling access to multiple memory zones in an isolated execution environment | Carl M. Ellison, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger +4 more | 2005-08-23 |
| 6795905 | Controlling accesses to isolated memory using a memory controller for isolated execution | Carl M. Ellison, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger +4 more | 2004-09-21 |
| 6769058 | Resetting a processor in an isolated execution environment | Carl M. Ellison, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger +4 more | 2004-07-27 |
| 6760441 | Generating a key hieararchy for use in an isolated execution environment | Carl M. Ellison, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger +4 more | 2004-07-06 |
| 6754815 | Method and system for scrubbing an isolated area of memory after reset of a processor operating in isolated execution mode if a cleanup flag is set | Carl M. Ellison, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger +4 more | 2004-06-22 |
| 6678825 | Controlling access to multiple isolated memories in an isolated execution environment | Carl M. Ellison, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger +4 more | 2004-01-13 |
| 6633963 | Controlling access to multiple memory zones in an isolated execution environment | Carl M. Ellison, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger +4 more | 2003-10-14 |
| 6578059 | Methods and apparatus for controlling exponent range in floating-point calculations | Jerome C. Huck, Peter Markstein, Glenn T. Colon-Bonet, Alan H. Karp, Michael J. Morrison +1 more | 2003-06-10 |
| 6507904 | Executing isolated mode instructions in a secure system running in privilege rings | Carl M. Ellison, Howard C. Herbert, Derrick C. Lin, Francis X. McKeen, Gilbert Neiger +4 more | 2003-01-14 |
| 6502117 | Data manipulation instruction for enhancing value and efficiency of complex arithmetic | Carole Dulong | 2002-12-31 |
| 6378067 | Exception reporting architecture for SIMD-FP instructions | Gautam Doshi, Sivakumar Makineni | 2002-04-23 |
| 6370639 | Processor architecture having two or more floating-point status fields | Jerome C. Huck, Peter Markstein, Glenn T. Colon-Bonet, Alan H. Karp, Michael J. Morrison +2 more | 2002-04-09 |
| 6321327 | Method for setting a bit associated with each component of packed floating-pint operand that is normalized in SIMD operations | Sivakumar Makineni, Sunnhyuk Kimn, Gautam Doshi | 2001-11-20 |
| 6292886 | Scalar hardware for performing SIMD operations | Sivakumar Makineni, Sunnhyuk Kimn, Gautam Doshi | 2001-09-18 |
| 6272512 | Data manipulation instruction for enhancing value and efficiency of complex arithmetic | Carole Dulong | 2001-08-07 |
| 6249798 | Method, apparatus and computer system for directly transferring and translating data between an integer processing unit and a floating point processing unit | Michael J. Morrison, Glenn T. Colon-Bonet, Guatam Bhawandas Doshi, Jerome C. Huck, Alan H. Karp +1 more | 2001-06-19 |
| 6243734 | Computer product and method for sparse matrices | Gautam Doshi, Bob Norin | 2001-06-05 |
| 6212627 | System for converting packed integer data into packed floating point data in reduced time | Carole Dulong | 2001-04-03 |
| 6212539 | Methods and apparatus for handling and storing bi-endian words in a floating-point processor | Jerome C. Huck, Peter Markstein, Glenn T. Colon-Bonet, Alan H. Karp, Michael J. Morrison +1 more | 2001-04-03 |
| 6185670 | System for reducing number of opcodes required in a processor using an instruction format including operation class code and operation selector code fields | Thomas R. Huff, Shreekant S. Thakkar | 2001-02-06 |
| 6151669 | Methods and apparatus for efficient control of floating-point status register | Jerome C. Huck, Peter Markstein, Glenn T. Colon-Bonet, Alan H. Karp, Michael J. Morrison +2 more | 2000-11-21 |
| 6105047 | Method and apparatus for trading performance for precision when processing denormal numbers in a computer system | Harshvardhan Sharangpani | 2000-08-15 |
| 6073210 | Synchronization of weakly ordered write combining operations using a fencing mechanism | Salvador Palanca, Vladimir Pentkovski, Subramaniam Maiyuran, Lance Hacking, Shreekant S. Thakkar | 2000-06-06 |