RC

Robert P. Colwell

IN Intel: 35 patents #1,016 of 30,777Top 4%
DE Digital Equipment: 3 patents #412 of 2,100Top 20%
📍 Guilford, CT: #24 of 437 inventorsTop 6%
🗺 Connecticut: #694 of 34,797 inventorsTop 2%
Overall (All Time): #80,256 of 4,157,543Top 2%
40
Patents All Time

Issued Patents All Time

Showing 26–40 of 40 patents

Patent #TitleCo-InventorsDate
5564056 Method and apparatus for zero extension and bit shifting to preserve register parameters in a microprocessor utilizing register renaming Michael A. Fetterman, Andrew F. Glew, Glenn J. Hinton, David B. Papworth 1996-10-08
5561814 Methods and apparatus for determining memory operating characteristics for given memory locations via assigned address ranges Andrew F. Glew, Glenn J. Hinton, David B. Papworth, Michael A. Fetterman, Frederick J. Pollack 1996-10-01
5548776 N-wide bypass for data dependencies within register alias table Andrew F. Glew 1996-08-20
5546597 Ready selection of data dependent instructions using multi-cycle cams in a processor performing out-of-order instruction execution Robert W. Martell, Glenn J. Hinton, Michael A. Fetterman, David B. Papworth, Andrew F. Glew 1996-08-13
5524262 Apparatus and method for renaming registers in a processor and resolving data dependencies thereof Andrew F. Glew 1996-06-04
5499352 Floating point register alias table FXCH and retirement floating point register array David W. Clift, James M. Arnold, Andrew F. Glew 1996-03-12
5497493 High byte right-shift apparatus with a register alias table Andrew F. Glew 1996-03-05
5471633 Idiom recognizer within a register alias table Andrew F. Glew, David B. Papworth, Glenn J. Hinton, David W. Clift 1995-11-28
5452426 Coordinating speculative and committed state register source data and immediate source data in a processor David B. Papworth, Glenn J. Hinton, Michael A. Fetterman, Andrew F. Glew 1995-09-19
5446912 Partial width stalls within register alias table Andrew F. Glew 1995-08-29
5307506 High bandwidth multiple computer bus apparatus John O'Donnell, David B. Papworth 1994-04-26
5179680 Instruction storage and cache miss recovery in a high speed multiprocessing parallel processing apparatus John O'Donnell, David B. Papworth, Paul Rodman 1993-01-12
5057837 Instruction storage method with a compressed format using a mask word John O'Donnell, David B. Papworth, Paul Rodman 1991-10-15
4920477 Virtual address table look aside buffer miss recovery method and apparatus John O'Donnell, David B. Papworth, Paul Rodman 1990-04-24
4833599 Hierarchical priority branch handling for parallel execution in a parallel processor John O'Donnell, David B. Papworth, Paul Rodman 1989-05-23