Issued Patents All Time
Showing 26–32 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5510740 | Method for synchronizing clocks upon reset | Sharad Mehrotra | 1996-04-23 |
| 5488639 | Parallel multistage synchronization method and apparatus | Peter D. MacWilliams, Dror Avni, Avi Liebermensch, Anan Baransy | 1996-01-30 |
| 5355467 | Second level cache controller unit and system | Peter D. MacWilliams, Adalberto Golbert, Itzik Silas | 1994-10-11 |
| 5293603 | Cache subsystem for microprocessor based computer system with synchronous and asynchronous data path | Peter D. MacWilliams, Clair Webb | 1994-03-08 |
| 5228134 | Cache memory integrated circuit for use with a synchronous central processor bus and an asynchronous memory bus | Peter D. MacWilliams, Clair Webb | 1993-07-13 |
| 4807109 | High speed synchronous/asynchronous local bus and data transfer method | Alireza Sarabi, Raymond S. Tetrick | 1989-02-21 |
| 4570220 | High speed parallel bus and data transfer method | Raymond S. Tetrick, John Beaston, Alireza Sarabi, Sudarshan Balachandran, Edwin L. Jacks, Jr. +1 more | 1986-02-11 |