Issued Patents All Time
Showing 26–50 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11972230 | Matrix transpose and multiply | Robert Valentine, Barukh Ziv, Amit Gradstein, Simon Rubanovich, Zeev Sperber +5 more | 2024-04-30 |
| 11941395 | Apparatuses, methods, and systems for instructions for 16-bit floating-point matrix dot product instructions | Alexander Heinecke, Robert Valentine, Mark J. Charney, Christopher J. Hughes, Evangelos Georganas +3 more | 2024-03-26 |
| 11893389 | Systems and methods for performing 16-bit floating-point matrix dot product instructions | Alexander Heinecke, Robert Valentine, Mark J. Charney, Raanan Sade, Zeev Sperber +2 more | 2024-02-06 |
| 11847452 | Systems, methods, and apparatus for tile configuration | Robert Valentine, Zeev Sperber, Mark J. Charney, Bret L. Toll, Rinat Rappoport +6 more | 2023-12-19 |
| 11816483 | Systems, methods, and apparatuses for matrix operations | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +5 more | 2023-11-14 |
| 11809869 | Systems and methods to store a tile register pair to memory | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +5 more | 2023-11-07 |
| 11714642 | Systems, methods, and apparatuses for tile store | Robert Valentine, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll, Milind B. Girkar, Zeev Sperber +9 more | 2023-08-01 |
| 11669326 | Systems, methods, and apparatuses for dot product operations | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +5 more | 2023-06-06 |
| 11645077 | Systems and methods to zero a tile register pair | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +6 more | 2023-05-09 |
| 11614936 | Systems and methods for performing 16-bit floating-point matrix dot product instructions | Alexander Heinecke, Robert Valentine, Mark J. Charney, Raanan Sade, Zeev Sperber +2 more | 2023-03-28 |
| 11609762 | Systems and methods to load a tile register pair | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +5 more | 2023-03-21 |
| 11567765 | Systems, methods, and apparatuses for tile load | Robert Valentine, Milind B. Girkar, Zeev Sperber, Mark J. Charney, Bret L. Toll +9 more | 2023-01-31 |
| 11372643 | Systems and methods for performing instructions to convert to 16-bit floating-point format | Alexander Heinecke, Robert Valentine, Mark J. Charney, Raanan Sade, Zeev Sperber +2 more | 2022-06-28 |
| 11366663 | Systems and methods for performing 16-bit floating-point vector dot product instructions | Alexander Heinecke, Robert Valentine, Mark J. Charney, Raanan Sade, Zeev Sperber +2 more | 2022-06-21 |
| 11360770 | Systems, methods, and apparatuses for zeroing a matrix | Robert Valentine, Zeev Sperber, Mark J. Charney, Bret L. Toll, Jesus Corbal +4 more | 2022-06-14 |
| 11288069 | Systems, methods, and apparatuses for tile store | Robert Valentine, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll, Milind B. Girkar, Zeev Sperber +9 more | 2022-03-29 |
| 11263009 | Systems and methods for performing 16-bit floating-point vector dot product instructions | Alexander Heinecke, Robert Valentine, Mark J. Charney, Raanan Sade, Zeev Sperber +2 more | 2022-03-01 |
| 11163565 | Systems, methods, and apparatuses for dot production operations | Robert Valentine, Dan Baum, Zeev Sperber, Jesus Corbal, Elmoustapha Ould-Ahmed-Vall +5 more | 2021-11-02 |
| 11093247 | Systems and methods to load a tile register pair | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +5 more | 2021-08-17 |
| 11086623 | Systems, methods, and apparatuses for tile matrix multiplication and accumulation | Robert Valentine, Zeev Sperber, Mark J. Charney, Bret L. Toll, Rinat Rappoport +7 more | 2021-08-10 |
| 11080048 | Systems, methods, and apparatus for tile configuration | Robert Valentine, Zeev Sperber, Mark J. Charney, Bret L. Toll, Rinat Rappoport +6 more | 2021-08-03 |
| 11068262 | Systems and methods for performing instructions to convert to 16-bit floating-point format | Alexander Heinecke, Robert Valentine, Mark J. Charney, Raanan Sade, Zeev Sperber +2 more | 2021-07-20 |
| 11068263 | Systems and methods for performing instructions to convert to 16-bit floating-point format | Alexander Heinecke, Robert Valentine, Mark J. Charney, Raanan Sade, Zeev Sperber +2 more | 2021-07-20 |
| 11036504 | Systems and methods for performing 16-bit floating-point vector dot product instructions | Alexander Heinecke, Robert Valentine, Mark J. Charney, Raanan Sade, Zeev Sperber +2 more | 2021-06-15 |
| 11023235 | Systems and methods to zero a tile register pair | Raanan Sade, Simon Rubanovich, Amit Gradstein, Zeev Sperber, Alexander Heinecke +6 more | 2021-06-01 |