Issued Patents All Time
Showing 51–75 of 109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9489322 | Reducing latency of unified memory transactions | Prashanth Kalluraya | 2016-11-08 |
| 9442855 | Transaction layer packet formatting | Jasmin Ajanovic, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark Rosenbluth +13 more | 2016-09-13 |
| 9405718 | Leveraging an enumeration and/or configuration mechanism of one interconnect protocol for a different interconnect protocol | Sridharan Ranganathan | 2016-08-02 |
| 9396152 | Device, system and method for communication with heterogenous physical layers | Akshay G. Pethe, Manjari Kulkarni | 2016-07-19 |
| 9390046 | Controlling a physical link of a first protocol using an extended capability structure of a second protocol | — | 2016-07-12 |
| 9378173 | Apparatus and method to maximize buffer utilization in an I/O controller | Wilfred W. Kwok, Sridhar Muthrasanallur | 2016-06-28 |
| 9262360 | Architected protocol for changing link operating mode | Su Wei Lim | 2016-02-16 |
| 9262347 | Method, apparatus and system for measuring latency in a physical unit of a circuit | David J. Harriman, Abdul R. Ismail, Daniel S. Froelich | 2016-02-16 |
| 9223735 | Providing a consolidated sideband communication channel between devices | David J. Harriman, Robert E. Gough, James E. Jaussi | 2015-12-29 |
| 9158363 | Power management for a system on a chip (SoC) | Woojong Han, Madhu Athreya, Ken Shoemaker, Arvind Mandhani, Ticky Thakkar | 2015-10-13 |
| 9152596 | Architected protocol for changing link operating mode | Su Wei Lim | 2015-10-06 |
| 9141577 | Optimized link training and management mechanism | David J. Harriman | 2015-09-22 |
| 9098415 | PCI express transaction descriptor | Jasmin Ajanovic, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark Rosenbluth +13 more | 2015-08-04 |
| 9086966 | Systems, apparatuses, and methods for handling timeouts | Su Wei Lim | 2015-07-21 |
| 9031064 | Providing a load/store communication protocol with a low power physical unit | Sridharan Ranganathan, David J. Harriman | 2015-05-12 |
| 9032103 | Transaction re-ordering | Jasmin Ajanovic, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark Rosenbluth +13 more | 2015-05-12 |
| 9026682 | Prefectching in PCI express | Jasmin Ajanovic, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark Rosenbluth +13 more | 2015-05-05 |
| 8972640 | Controlling a physical link of a first protocol using an extended capability structure of a second protocol | — | 2015-03-03 |
| 8924620 | Providing a consolidated sideband communication channel between devices | David J. Harriman, Robert E. Gough, James E. Jaussi | 2014-12-30 |
| 8850247 | Power management for a system on a chip (SoC) | Woojong Han, Madhu Athreya, Ken Shoemaker, Arvind Mandhani, Ticky Thakkar | 2014-09-30 |
| 8819388 | Control of on-die system fabric blocks | Zhen Fang, Jasmin Ajanovic, Michael E. Espig, Ravishankar Iyer | 2014-08-26 |
| 8811430 | Packetized interface for coupling agents | Abhishek Singhal, Jasmin Ajanovic | 2014-08-19 |
| 8793404 | Atomic operations | Jasmin Ajanovic, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark Rosenbluth +13 more | 2014-07-29 |
| 8751722 | Providing a peripheral component interconnect (PCI)-compatible transaction level protocol for a system on a chip (SoC) | Ken Shoemaker, Woojong Han, Madhu Athreya, Arvind Mandhani, Shreekant S. Thakkar | 2014-06-10 |
| 8745303 | Integrating non-peripheral component interconnect (PCI) resources into a computer system | Arvind Mandhani, Woojong Han, Ken Shoemaker, Madhu Athreya, Shreekant S. Thakkar | 2014-06-03 |