LS

Lakshminarayanan Striramassarma

IN Intel: 49 patents #648 of 30,777Top 3%
📍 Folsom, CA: #42 of 1,500 inventorsTop 3%
🗺 California: #8,171 of 386,348 inventorsTop 3%
Overall (All Time): #55,148 of 4,157,543Top 2%
49
Patents All Time

Issued Patents All Time

Showing 26–49 of 49 patents

Patent #TitleCo-InventorsDate
11763416 Disaggregation of system-on-chip (SOC) architecture Naveen Matam, Lance Cheney, Eric Finley, Varghese George, Sanjeev Jahagirdar +6 more 2023-09-19
11755501 Efficient data sharing for graphics data processing operations Joydeep Ray, Altug Koker, Elmoustapha Ould-Ahmed-Vall, Michael Macpherson, Aravindh Anantaraman +4 more 2023-09-12
11756150 Disaggregation of system-on-chip (SOC) architecture Naveen Matam, Lance Cheney, Eric Finley, Varghese George, Sanjeev Jahagirdar +6 more 2023-09-12
11676239 Sparse optimizations for a matrix accelerator architecture Joydeep Ray, Scott Janus, Varghese George, Subramaniam Maiyuran, Altug Koker +12 more 2023-06-13
11620256 Systems and methods for improving cache efficiency and utilization Altug Koker, Joydeep Ray, Ben J. Ashbaugh, Jonathan Pearce, Abhishek R. Appu +19 more 2023-04-04
11593269 Sector cache for compression Abhishek R. Appu, Altug Koker, Joydeep Ray, David Puffer, Prasoonkumar Surti +4 more 2023-02-28
11586548 Sector cache for compression Abhishek R. Appu, Altug Koker, Joydeep Ray, David Puffer, Prasoonkumar Surti +4 more 2023-02-21
11409658 Data prefetching for graphics data processing Vikranth Vemulapalli, Mike B. Macpherson, Aravindh Anantaraman, Ben J. Ashbaugh, Murali Ramadoss +16 more 2022-08-09
11410266 Disaggregation of System-On-Chip (SOC) architecture Naveen Matam, Lance Cheney, Eric Finley, Varghese George, Sanjeev Jahagirdar +6 more 2022-08-09
11386521 Enabling product SKUS based on chiplet configurations Altug Koker, Lance Cheney, Eric Finley, Varghese George, Sanjeev Jahagirdar +6 more 2022-07-12
11301384 Partial write management in a multi-tiled compute engine Joydeep Ray, James Valerio, Ben J. Ashbaugh 2022-04-12
11263141 Sector cache for compression Abhishek R. Appu, Altug Koker, Joydeep Ray, David Puffer, Prasoonkumar Surti +4 more 2022-03-01
11145105 Multi-tile graphics processor rendering Prasoonkumar Surti, Arthur Hunter, Kamal Sinha, Scott Janus, Brent Insko +1 more 2021-10-12
11113784 Sparse optimizations for a matrix accelerator architecture Joydeep Ray, Scott Janus, Varghese George, Subramaniam Maiyuran, Altug Koker +12 more 2021-09-07
10909039 Data prefetching for graphics data processing Vikranth Vemulapalli, Mike B. Macpherson, Aravindh Anantaraman, Ben J. Ashbaugh, Murali Ramadoss +16 more 2021-02-02
10909652 Enabling product SKUs based on chiplet configurations Altug Koker, Lance Cheney, Eric Finley, Varghese George, Sanjeev Jahagirdar +6 more 2021-02-02
10803548 Disaggregation of SOC architecture Naveen Matam, Lance Cheney, Eric Finley, Varghese George, Sanjeev Jahagirdar +6 more 2020-10-13
10802967 Partial write management in a multi-tiled compute engine Joydeep Ray, James Valerio, Ben J. Ashbaugh 2020-10-13
10783084 Sector cache for compression Abhishek R. Appu, Atlug Koker, Joydeep Ray, David Puffer, Prasoonkumar Surti +4 more 2020-09-22
10580109 Data distribution fabric in scalable GPUs Altug Koker, Akif Ali 2020-03-03
10503652 Sector cache for compression Abhishek R. Appu, Altug Koker, Joydeep Ray, David Puffer, Prasoonkumar Surti +4 more 2019-12-10
10346946 Data distribution fabric in scalable GPUs Altug Koker, Akif Ali 2019-07-09
10102604 Data distribution fabric in scalable GPUs Altug Koker, Akif Ali 2018-10-16
9330433 Data distribution fabric in scalable GPUs Altug Koker, Akif Ali 2016-05-03