EF

Eric Finley

IN Intel: 10 patents #4,046 of 30,777Top 15%
Overall (All Time): #491,369 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12141890 Enabling product SKUs based on chiplet configurations Altug Koker, Lance Cheney, Varghese George, Sanjeev Jahagirdar, Josh B. Mastronarde +6 more 2024-11-12
12112398 Disaggregation of system-on-chip (SOC) architecture Naveen Matam, Lance Cheney, Varghese George, Sanjeev Jahagirdar, Altug Koker +6 more 2024-10-08
12056789 Disaggregation of system-on-chip (SOC) architecture Naveen Matam, Lance Cheney, Varghese George, Sanjeev Jahagirdar, Altug Koker +6 more 2024-08-06
11763416 Disaggregation of system-on-chip (SOC) architecture Naveen Matam, Lance Cheney, Varghese George, Sanjeev Jahagirdar, Altug Koker +6 more 2023-09-19
11756150 Disaggregation of system-on-chip (SOC) architecture Naveen Matam, Lance Cheney, Varghese George, Sanjeev Jahagirdar, Altug Koker +6 more 2023-09-12
11410266 Disaggregation of System-On-Chip (SOC) architecture Naveen Matam, Lance Cheney, Varghese George, Sanjeev Jahagirdar, Altug Koker +6 more 2022-08-09
11386521 Enabling product SKUS based on chiplet configurations Altug Koker, Lance Cheney, Varghese George, Sanjeev Jahagirdar, Josh B. Mastronarde +6 more 2022-07-12
10983581 Resource load balancing based on usage and power limits Sanjeev Jahagirdar, Altug Koker, Yoav Harel, Kenneth Brand, Chandra Gurram +2 more 2021-04-20
10909652 Enabling product SKUs based on chiplet configurations Altug Koker, Lance Cheney, Varghese George, Sanjeev Jahagirdar, Josh B. Mastronarde +6 more 2021-02-02
10803548 Disaggregation of SOC architecture Naveen Matam, Lance Cheney, Varghese George, Sanjeev Jahagirdar, Altug Koker +6 more 2020-10-13