Issued Patents All Time
Showing 101–125 of 270 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9052985 | Method and apparatus for efficient programmable cyclic redundancy check (CRC) | Vinodh Gopal, Erdinc Ozturk, Wajdi K. Feghali | 2015-06-09 |
| 9047082 | Instruction-set architecture for programmable Cyclic Redundancy Check (CRC) computations | Vinodh Gopal, Shay Gueron, Wajdi K. Feghali, Kirk S. Yap, Bradley A. Burres | 2015-06-02 |
| 9027104 | Instructions processors, methods, and systems to process secure hash algorithms | Kirk S. Yap, Vinodh Gopal, James D. Guilford | 2015-05-05 |
| 8953785 | Instruction set for SKEIN256 SHA3 algorithm on a 128-bit processor | Kirk S. Yap, Vinodh Gopal | 2015-02-10 |
| 8954754 | Method and apparatus to process SHA-1 secure hashing algorithm | Kirk S. Yap, James D. Guilford, Vinodh Gopal, Erdinc Ozturk, Sean M. Gulley +2 more | 2015-02-10 |
| 8947270 | Apparatus and method to accelerate compression and decompression operations | Vinodh Gopal, James D. Guilford | 2015-02-03 |
| 8929539 | Instructions to perform Groestl hashing | Kirk S. Yap, Vinodh Gopal, James D. Guilford, Erdinc Ozturk, Sean M. Gulley +2 more | 2015-01-06 |
| 8930681 | Enhancing performance by instruction interleaving and/or concurrent processing of multiple buffers | James D. Guilford, Wajdi K. Feghali, Vinodh Gopal, Erdinc Ozturk, Martin G. Dixon +2 more | 2015-01-06 |
| 8924741 | Instruction and logic to provide SIMD secure hashing round slice functionality | Vinodh Gopal, Kirk S. Yap | 2014-12-30 |
| 8874933 | Instruction set for SHA1 round processing on 128-bit data paths | Kirk S. Yap, Vinodh Gopal, Sean M. Gulley, James D. Guilford | 2014-10-28 |
| 8838997 | Instruction set for message scheduling of SHA256 algorithm | Kirk S. Yap, James D. Guilford, Vinodh Gopal, Sean M. Gulley | 2014-09-16 |
| 8781110 | Unified system architecture for elliptic-curve cryptography | Vinodh Gopal, Erdinc Ozturk, Wajdi K. Feghali | 2014-07-15 |
| 8738893 | Add instructions to add three source operands | Vindoh Gopal, James D. Guilford, Wajdi K. Feghali, Erdinc Ozturk, Martin G. Dixon +5 more | 2014-05-27 |
| 8738886 | Memory mapping in a processor having multiple programmable units | Debra Bernstein, Daniel Cutter, Christopher Dolan, Matthew J. Adiletta | 2014-05-27 |
| 8732548 | Instruction-set architecture for programmable cyclic redundancy check (CRC) computations | Vinodh Gopal, Shay Gueron, Wajdi K. Feghali, Kirk S. Yap, Bradley A. Burres | 2014-05-20 |
| 8689078 | Determining a message residue | Shay Gueron, Vinodh Gopal, Wajdi K. Feghali | 2014-04-01 |
| 8549264 | Add instructions to add three source operands | Vinodh Gopal, James D. Guilford, Wajdi K. Feghali, Erdinc Ozturk, Martin G. Dixon +5 more | 2013-10-01 |
| 8520845 | Method and apparatus for expansion key generation for block ciphers | Erdinc Ozturk, Kirk S. Yap, Wajdi K. Feghali, Vinodh Gopal | 2013-08-27 |
| 8504807 | Rotate instructions that complete execution without reading carry flag | Vinodh Gopal, James D. Guilford, Wajdi K. Feghali, Erdinc Ozturk, Martin G. Dixon +5 more | 2013-08-06 |
| 8484147 | Pattern matching | Christopher F. Clark, Vinodh Gopal | 2013-07-09 |
| 8464125 | Instruction-set architecture for programmable cyclic redundancy check (CRC) computations | Vinodh Gopal, Shay Gueron, Wajdi K. Feghali, Kirk S. Yap, Bradley A. Burres | 2013-06-11 |
| 8392494 | Method and apparatus for performing efficient side-channel attack resistant reduction using montgomery or barrett reduction | Vinodh Gopal, Wajdi K. Feghali, James D. Guilford, Erdinc Ozturk, Martin G. Dixon | 2013-03-05 |
| 8391475 | Method and apparatus for advanced encryption standard (AES) block cipher | Vinodh Gopal, Erdinc Ozturk, Wajdi K. Feghali, Kirk S. Yap | 2013-03-05 |
| 8380923 | Queue arrays in network devices | Mark Rosenbluth, Debra Bernstein | 2013-02-19 |
| 8380777 | Normal-basis to canonical-basis transformation for binary galois-fields GF(2m) | Erdinc Ozturk, Vinodh Gopal, Wajdi K. Feghali | 2013-02-19 |