Issued Patents All Time
Showing 176–200 of 208 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5909126 | Programmable logic array integrated circuit devices with interleaved logic array blocks | Richard G. Cliff, Francis B. Heile, Joseph Huang, Christopher F. Lane, Fung Fung Lee +7 more | 1999-06-01 |
| 5898318 | Programmable logic array integrated circuits with enhanced cascade | — | 1999-04-27 |
| 5872463 | Routing in programmable logic devices using shared distributed programmable logic connectors | — | 1999-02-16 |
| 5861760 | Programmable logic device macrocell with improved capability | John C. Costello | 1999-01-19 |
| 5859542 | Programmable logic array integrated circuits with enhanced cascade | — | 1999-01-12 |
| 5850152 | Programmable logic array integrated circuit devices | Richard G. Cliff, Srinivas T. Reddy, David Jefferson, Rina Raman, L. Todd Cope +7 more | 1998-12-15 |
| 5850151 | Programmable logic array intergrated circuit devices | Richard G. Cliff, Srinivas T. Reddy, David Jefferson, Rina Raman, L. Todd Cope +7 more | 1998-12-15 |
| RE35977 | Look up table implementation of fast carry arithmetic and exclusive-or operations | Richard G. Cliff, L. Todd Cope, Kerry Veenstra | 1998-12-01 |
| 5835998 | Logic cell for programmable logic devices | — | 1998-11-10 |
| 5815003 | Programmable logic integrated circuits with partitioned logic element using shared lab-wide signals | — | 1998-09-29 |
| 5796267 | Tri-Statable input/output circuitry for programmable logic | — | 1998-08-18 |
| 5787009 | Methods for allocating circuit design portions among physical circuit portions | — | 1998-07-28 |
| 5761099 | Programmable logic array integrated circuits with enhanced carry routing | — | 1998-06-02 |
| 5689195 | Programmable logic array integrated circuit devices | Richard G. Cliff, Srinivas T. Reddy, Rina Raman, L. Todd Cope, Joseph Huang | 1997-11-18 |
| 5670895 | Routing connections for programmable logic array integrated circuits | Peter J. Kazarian, Francis B. Heile, David W. Mendel | 1997-09-23 |
| 5649163 | Method of programming an asynchronous load storage device using a representation of a clear/preset storage device | — | 1997-07-15 |
| 5606266 | Programmable logic array integrated circuits with enhanced output routing | — | 1997-02-25 |
| 5604453 | Circuit for reducing ground bounce | — | 1997-02-18 |
| 5598108 | High-density erasable programmable logic device architecture using multiplexer interconnections, and registered macrocell with product term allocation and adjacent product term stealing | — | 1997-01-28 |
| 5572717 | Method and apparatus for assigning and analyzing timing specifications in a computer aided engineering program | — | 1996-11-05 |
| 5565793 | Programmable logic array integrated circuit devices with regions of enhanced interconnectivity | — | 1996-10-15 |
| 5557217 | High-density erasable programmable logic device architecture using multiplexer interconnections | — | 1996-09-17 |
| 5485103 | Programmable logic array with local and global conductors | Richard G. Cliff, Bahram Ahanin, Craig Lytle, Francis B. Heile, Kerry Veenstra | 1996-01-16 |
| 5436575 | Programmable logic array integrated circuits | Richard G. Cliff, Bahram Ahanin, Craig Lytle, Francis B. Heile, Kerry Veenstra | 1995-07-25 |
| 5384499 | High-density erasable programmable logic device architecture using multiplexer interconnections | David Chiang, Francis B. Heile, Cameron McClintock, Hock C. So, James A. Watson | 1995-01-24 |