Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11023326 | SSD restart based on off-time tracker | Andrew Morning-Smith, Emily Po-Kay Chung, William T. Glennan | 2021-06-01 |
| 10649484 | Dynamic adaptive clocking for non-common-clock interfaces | Anoop Mukker, Eng Hun Ooi, Robert J. Royer, Jr. | 2020-05-12 |
| 10402565 | In-system provisioning of firmware for a hardware platform | Nitin V. Sarangdhar, Robert J. Royer, Jr., Eng Hun Ooi, Mukesh Kataria | 2019-09-03 |
| 10345885 | Power control of a memory device through a sideband channel of a memory bus | Robert J. Royer, Jr., Anoop Mukker, Eng Hun Ooi, Ritesh B. Trivedi | 2019-07-09 |
| 9952619 | Dynamic adaptive clocking for non-common-clock interfaces | Anoop Mukker, Eng Hun Ooi, Robert J. Royer, Jr. | 2018-04-24 |
| 9792246 | Lower-power scrambling with improved signal integrity | Ee Loon Teoh, Eng Hun Ooi, Christopher P. Mozak | 2017-10-17 |
| 9594910 | In-system provisioning of firmware for a hardware platform | Nitin V. Sarangdhar, Robert J. Royer, Jr., Eng Hun Ooi, Mukesh Kataria | 2017-03-14 |
| 8528925 | Running board attachment | — | 2013-09-10 |
| 5493149 | Transistor device with increased breakdown voltage | Rick C. Jerome, Frank Marazita | 1996-02-20 |
| 5436496 | Vertical fuse device | Rick C. Jerome, Ronald P. Kovacs, George E. Ganschow, Lawrence K. Lam, James L. Bouknight +2 more | 1995-07-25 |
| 5355015 | High breakdown lateral PNP transistor | Frank Marazita, John E. Readdie | 1994-10-11 |
| 5298437 | Fabrication process for Schottky barrier diodes on a single poly bipolar process | Frank Marazita, John E. Readdie | 1994-03-29 |
| 5298440 | Method of fabrication of transistor device with increased breakdown voltage | Rick C. Jerome, Frank Marazita | 1994-03-29 |