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Semiconductor device power metallization layer with stress-relieving heat sink structure |
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Integrated circuit arrangement with an auxiliary indentation, particularly with aligning marks |
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Method for producing an integrated circuit assembly with an auxiliary indentation, particularly with aligning marks, and an integrated circuit arrangement |
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2010-09-14 |
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Method for fabricating a non-volatile semiconductor memory cell with a separate tunnel window |
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Method, system and method of using a component for setting the electrical characteristics of microelectronic circuit configurations |
Stephan Bradl, Oliver Gehring |
2002-10-01 |
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Polishing agent for semiconductor substrates |
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2002-09-10 |
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Method for forming a trench structure in a silicon substrate |
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2002-01-08 |
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Device and method for end-point monitoring used in the polishing of components, in particular semiconductor components |
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