Issued Patents All Time
Showing 26–50 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6528392 | Dicing configuration for separating a semiconductor component from a semiconductor wafer | Robert Feurle | 2003-03-04 |
| 6458631 | Method for fabricating an integrated circuit, in particular an antifuse | Axel Brintzinger, Ulrich Frey, Jürgen Lindolf, Stefan Dankowski, Matthias Lehr +2 more | 2002-10-01 |
| 6456522 | Integrated memory having memory cells and buffer capacitors | Robert Feurle | 2002-09-24 |
| 6441469 | Semiconductor memory configuration with dummy components on continuous diffusion regions | Athanasia Chrysostomides, Robert Feurle, Helmut Schneider | 2002-08-27 |
| 6426640 | Semiconductor module for burn-in test configuration | Norbert Wirth, Eric Cordes, Zoltan Manyoki | 2002-07-30 |
| 6426899 | Integrated memory with a buffer circuit | Robert Feurle, Helmut Schneider | 2002-07-30 |
| 6317378 | Buffer circuit | Robert Feurle, Helmut Schneider | 2001-11-13 |
| 6310399 | Semiconductor memory configuration with a bit-line twist | Robert Feurle, Sabine Mandel, Helmut Schneider | 2001-10-30 |
| 6307263 | Integrated semiconductor chip with modular dummy structures | Helmut Schneider | 2001-10-23 |
| 6294841 | Integrated semiconductor circuit having dummy structures | Robert Feurle, Helmut Schneider | 2001-09-25 |
| 6256243 | Test circuit for testing a digital semiconductor circuit configuration | Wolfgang Nikutta, Michael Kund, Jan Ten Broke | 2001-07-03 |
| 6097650 | Circuit apparatus for evaluating the data content of memory cells | Rudiger Brede | 2000-08-01 |
| 5929491 | Integrated circuit with ESD protection | Heinz Hebbeker, Werner Reczek, Hartmud Terletzki | 1999-07-27 |
| 5905687 | Fuse refresh circuit | Rudiger Brede, Norbert Wirth | 1999-05-18 |
| 5661331 | Fuse bank | Heinz Hebbeker, Werner Reczek, Hartmud Terletzki | 1997-08-26 |
| 5657279 | Redundant circuit configuration for an integrated semiconductor memory | Diether Sommer, Oliver Kiehl | 1997-08-12 |
| 5592063 | Voltage generator circuit | Dieter Gleis, Manfred Menke | 1997-01-07 |
| 5546296 | Charge pump | Dieter Gleis, Manfred Menke | 1996-08-13 |
| 5546036 | Circuit array for amplifying and holding data with different supply | Diether Sommer, Dieter Gleis | 1996-08-13 |
| 5457655 | Column redundance circuit configuration for a memory | Jurgen Weidenhoefer, Diether Sommer | 1995-10-10 |
| 5444392 | CMOS input stage | Diether Sommer | 1995-08-22 |
| 5357469 | Method for data transfer for a semiconductor memory using combined control signals to provide high speed transfer, and semiconductor memory for carrying out the method | Diether Sommer | 1994-10-18 |
| 5327072 | Regulating circuit for a substrate bias voltage generator | Manfred Menke, Dieter Gleis | 1994-07-05 |
| 5293386 | Integrated semiconductor memory with parallel test capability and redundancy method | Peter Muhmenthaler, Hans-Dieter Oberle, Martin Peisl | 1994-03-08 |
| 5289037 | Conductor track configuration for very large-scale integrated circuits | Manfred Menke, Armin Kohlhase, Hanno Melzner | 1994-02-22 |