Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10628627 | Thermal estimation device and thermal estimation method | Ya-Ting Shyu, Juin-Ming Lu, Yao-Hua Chen, Yen F. Chang, Jai-Ming Lin | 2020-04-21 |
| 10009017 | On-chip apparatus and method for jitter measurement | Pei-Yuan Chou, Jinn-Shyan Wang | 2018-06-26 |
| 9773080 | Thermal simulation device and method | Juin-Ming Lu, Liang-Chia Cheng | 2017-09-26 |
| 8404501 | Semiconductor package structure and manufacturing method thereof | Po-Yao Huang, Chia-Yu Jin | 2013-03-26 |
| 7945404 | Clock jitter measurement circuit and integrated circuit having the same | Jung-Chi Ho, Sheng-Bin Lin | 2011-05-17 |
| 7912166 | Built-in jitter measurement circuit | Jen-Chien Hsu, Hung-Wen Lu, Chau-Chin Su | 2011-03-22 |
| 7904874 | Opposite-phase scheme for peak current reduction | Yow-Tyng Nieh, Sheng-Yu Hsu, Shih-Hsu Huang | 2011-03-08 |
| 7716542 | Programmable memory built-in self-test circuit and clock switching circuit thereof | Chung-Fu Lin | 2010-05-11 |
| 7603602 | Built-in self test circuit for analog-to-digital converter and phase lock loop and the testing methods thereof | — | 2009-10-13 |
| 7564285 | Controllable delay line and regulation compensation circuit thereof | Chia-Wei Chang | 2009-07-21 |
| 7506231 | Wrapper testing circuits and method thereof for system-on-a-chip | Wen-Ching Wu, Kun Luo, Chia-Jen Lee | 2009-03-17 |
| 7495479 | Sample and hold circuit and related data signal detecting method utilizing sample and hold circuit | Jen-Chien Hsu, Hung-Wen Lu, Chau-Chin Su | 2009-02-24 |
| 7475367 | Memory power models related to access information and methods thereof | Yaw-Feng Wang, Wen-Tsan Hsieh, Yi-Fang Chiu, Sheng-Yu Hsu | 2009-01-06 |
| 7352212 | Opposite-phase scheme for peak current reduction | Yow-Tyng Nieh, Sheng-Yu Hsu, Shih-Hsu Huang | 2008-04-01 |
| 7319625 | Built-in memory current test circuit | Kun Luo, Jung-Chi Ho, Cheng-Wen Wu, Chin-Jung Su | 2008-01-15 |
| 7228468 | Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification | Cheng-Wen Wu, Rei-Fu Huang, Chin-Lung Su, Wen-Ching Wu, Kun Luo +1 more | 2007-06-05 |
| 6950046 | IC with built-in self-test and design method thereof | Pei-Wen Luo, Jung-Chi Ho, Wen-Ching Wu | 2005-09-27 |
| 6937106 | Built-in jitter measurement circuit for voltage controlled oscillator and phase locked loop | Shen Lin, Wen-Ching Wu, Kun Luo | 2005-08-30 |