Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7228468 | Method and apparatus of build-in self-diagnosis and repair in a memory with syndrome identification | Cheng-Wen Wu, Rei-Fu Huang, Chin-Lung Su, Wen-Ching Wu, Yeong-Jar Chang +1 more | 2007-06-05 |
| 6981230 | On-chip power-ground inductance modeling using effective self-loop-inductance | Norman Chang, Weize Xie, Richard K. Chou | 2005-12-27 |
| 6981231 | System and method to reduce leakage power in an electronic device | Weize Xie, Norman Chang, Osamu Nakagawa | 2005-12-27 |
| 6937106 | Built-in jitter measurement circuit for voltage controlled oscillator and phase locked loop | Yeong-Jar Chang, Wen-Ching Wu, Kun Luo | 2005-08-30 |
| 6925555 | System and method for determining a plurality of clock delay values using an optimization algorithm | Norman Chang, Osamu Nakagawa, Weize Xie | 2005-08-02 |
| 6661281 | Method for reducing current surge using multi-stage ramp shunting | Osamu Nakagawa, Norman Chang, Weize Xie, Xuejue Huang | 2003-12-09 |
| 6621305 | Partial swing low power CMOS logic circuits | Osamu Nakagawa, Norman Chang, Weize Xie, Kenynmyung Lee | 2003-09-16 |
| 6566924 | Parallel push algorithm detecting constraints to minimize clock skew | Norman Chang, Keunmyung Lee, Osamu Nakagawa, Weize Xie | 2003-05-20 |
| 6567960 | System for improving circuit simulations by utilizing a simplified circuit model based on effective capacitance and inductance values | Norman Chang, Yu Cao, Osamu Nakagawa, Weize Xie | 2003-05-20 |
| 6487703 | Method and system for screening a VLSI design for inductive coupling noise | John G McBride, Osamn S. Nakagawa | 2002-11-26 |
| 6434724 | Method for extracting inductance parameters from a circuit design | Norman Chang, O. Samual Nakagawa | 2002-08-13 |