Issued Patents All Time
Showing 25 most recent of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11063935 | Systems and methods for providing remote desktop access | Rachelle Tobkes, Yufeng SHI, Jyoti Mathur, Christopher Fleck, Jacob Jared Summers | 2021-07-13 |
| 9438554 | Cross platform messaging | Christopher Fleck, Mark Templeton, Nathan Anderson | 2016-09-06 |
| 7031889 | Method and apparatus for evaluating the design quality of network nodes | — | 2006-04-18 |
| 6990643 | Method and apparatus for determining whether an element in an integrated circuit is a feedback element | — | 2006-01-24 |
| 6910193 | System and method for executing tests on an integrated circuit design | — | 2005-06-21 |
| 6718522 | Electrical rules checker system and method using tri-state logic for electrical rule checks | Jan Kok | 2004-04-06 |
| 6701290 | Method and apparatus for evaluating the design quality of network nodes | — | 2004-03-02 |
| 6654936 | Method and apparatus for determining the strengths and weaknesses of paths in an integrated circuit | — | 2003-11-25 |
| 6560571 | Method and apparatus for prioritizing the order in which checks are performed on a node in an integrated circuit | — | 2003-05-06 |
| 6550041 | Method and apparatus for evaluating the design quality of network nodes | — | 2003-04-15 |
| 6542860 | System and method for detecting nodes that are susceptible to floating | — | 2003-04-01 |
| 6523152 | Framework for rules checking utilizing resistor, nonresistor, node and small node data structures | Ted Rakel | 2003-02-18 |
| 6507807 | Method and apparatus for determining which branch of a network of an integrated circuit has the largest total effective RC delay | — | 2003-01-14 |
| 6487703 | Method and system for screening a VLSI design for inductive coupling noise | Osamn S. Nakagawa, Shen Lin | 2002-11-26 |
| 6484295 | Electrical rules checker system and method providing quality assurance of tri-state logic | Jan Kok | 2002-11-19 |
| 6484296 | Electrical rules checker system and method for reporting problems with tri-state logic in electrical rules checking | Jan Kok | 2002-11-19 |
| 6480987 | Method and system for estimating capacitive coupling in a hierarchical design | — | 2002-11-12 |
| 6449578 | Method and apparatus for determining the RC delays of a network of an integrated circuit | — | 2002-09-10 |
| 6434723 | System and method for evaluating a very large scale integrated circuit for potential design errors | Thomas Indermaur | 2002-08-13 |
| 6405347 | Method and apparatus for determining the maximum permitted and minimum required width of a feedback FET on a precharge node | — | 2002-06-11 |
| 6389578 | Method and apparatus for determining the strengths and weaknesses of paths in an integrated circuit | — | 2002-05-14 |
| 6367062 | System and method for detecting an excessive number of series-connected pass FETs | — | 2002-04-02 |
| 6367055 | Method and apparatus for determining certain characteristics of circuit elements | — | 2002-04-02 |
| 6327542 | System and method for approximating the coupling voltage noise on a node | — | 2001-12-04 |
| 6321365 | System and method for detecting storage nodes that are susceptible to charge sharing | — | 2001-11-20 |