Issued Patents All Time
Showing 26–41 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6311314 | System and method for evaluating the loading of a clock driver | — | 2001-10-30 |
| 6308301 | System and method for detecting multiplexers in a circuit design | Jan Kok | 2001-10-23 |
| 6305003 | System and method for propagating clock nodes in a netlist of circuit design | — | 2001-10-16 |
| 6301691 | System and method for detecting NFETs that pull up to VDD and PFETs that pull down to ground | — | 2001-10-09 |
| 6295632 | System and method for detecting the output of a clock driver | — | 2001-09-25 |
| 6279143 | Method and apparatus for generating a database which is used for determining the design quality of network nodes | Jan Kok | 2001-08-21 |
| 6275970 | Evaluation of the design quality of network nodes | — | 2001-08-14 |
| 6260180 | System and method for detecting FETs that are susceptible to bootstrapping | — | 2001-07-10 |
| 6249899 | System and method for detecting pass FETs | Jan Kok | 2001-06-19 |
| 6077717 | System and method for detecting NOR gates and NAND gates | — | 2000-06-20 |
| 5987237 | Framework for rules checking | — | 1999-11-16 |
| 5854943 | Speed efficient cache output selector circuitry based on tag compare and data organization | Ted Ziemkowski | 1998-12-29 |
| 5802565 | Speed optimal bit ordering in a cache memory | Ted Ziemkowski | 1998-09-01 |
| 5765194 | Timing consistent dynamic compare with force miss circuit | — | 1998-06-09 |
| 5689634 | Three purpose shadow register attached to the output of storage devices | — | 1997-11-18 |
| 5471640 | Programmable disk array controller having n counters for n disk drives for stripping data where each counter addresses specific memory location by a count n | — | 1995-11-28 |