| 12422480 |
Detecting hardware errors |
Adi Habusha, Nicolas Worms, Ilan Wachtel |
2025-09-23 |
| 12353307 |
Random instruction-side stressing in post-silicon validation |
Hillel Mendelson |
2025-07-08 |
| 12174750 |
Validating address space context switches by loading an alternative address space from an address translation independent location |
Idan Horowitz, Hillel Mendelson, Eliran Roffe |
2024-12-24 |
| 11928051 |
Test space sampling for model-based biased random system test through rest API |
Vitali Sokhin, Gil Eliezer Shurek, Shiri Moran |
2024-03-12 |
| 11907088 |
Testing of hardware queue systems using on device test generation |
Hillel Mendelson, Hagai Hadad, Shay Aviv |
2024-02-20 |
| 11796593 |
Compiler-based code generation for post-silicon validation |
Hillel Mendelson, Shay Aviv, Vitali Sokhin, Wesam Saleem Ibraheem |
2023-10-24 |
| 11748238 |
Model-based biased random system test through rest API |
Vitali Sokhin, Dean G. Bair, Gil Eliezer Shurek, Shiri Moran |
2023-09-05 |
| 11263150 |
Testing address translation cache |
Hillel Mendelson, Vitali Sokhin |
2022-03-01 |
| 11226370 |
Recoverable exceptions generation and handling for post-silicon validation |
Hillel Mendelson, Vitali Sokhin, Hernan Theiler, Shai Doron |
2022-01-18 |
| 11204859 |
Partial-results post-silicon hardware exerciser |
Alex Lvovsky, Hillel Mendelson, Vitali Sokhin |
2021-12-21 |
| 11200126 |
Utilizing translation tables for testing processors |
Hillel Mendelson, Vitali Sokhin, Shay Aviv |
2021-12-14 |
| 11194705 |
Automatically introducing register dependencies to tests |
Hillel Mendelson, Vitali Sokhin |
2021-12-07 |
| 11182265 |
Method and apparatus for test generation |
Hillel Mendelson, Vitali Sokhin |
2021-11-23 |
| 10496449 |
Verification of atomic memory operations |
Hillel Mendelson, Vitali Sokhin |
2019-12-03 |
| 9633155 |
Circuit modification |
Wesam Saleem Ibraheem, Anatoly Koyfman, Ronny Morad, Vitali Sokhin, Elena Tsanko |
2017-04-25 |
