Issued Patents All Time
Showing 101–125 of 131 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6418497 | Method and system for interrupt handling using system pipelined packet transfers | Guy L. Guthrie, Richard Allen Kelley, Danny Marvin Neal | 2002-07-09 |
| 6418503 | Buffer re-ordering system | Daniel F. Moertl, Danny Marvin Neal, Adalberto G. Yanes | 2002-07-09 |
| 6405276 | Selectively flushing buffered transactions in a bus bridge | Wen-Tzer T. Chen, Richard Allen Kelley, Danny Marvin Neal | 2002-06-11 |
| 6351784 | System for determining whether a subsequent transaction may be allowed or must be allowed or must not be allowed to bypass a preceding transaction | Danny Marvin Neal | 2002-02-26 |
| 6347349 | System for determining whether a subsequent transaction may be allowed or must be allowed or must not be allowed to bypass a preceding transaction | Danny Marvin Neal | 2002-02-12 |
| 6327636 | Ordering for pipelined read transfers | Guy L. Guthrie, Richard Allen Kelley, Danny Marvin Neal | 2001-12-04 |
| 6324612 | Associating buffers in a bus bridge with corresponding peripheral devices to facilitate transaction merging | Wen-Tzer T. Chen, Richard Allen Kelley, Danny Marvin Neal | 2001-11-27 |
| 6304984 | Method and system for injecting errors to a device within a computer system | Danny Marvin Neal | 2001-10-16 |
| 6301627 | Method/system for identifying delayed predetermined information transfer request as bypassable by subsequently-generated information transfer request using bypass enable bit in bridge translation control entry | Danny Marvin Neal | 2001-10-09 |
| 6301630 | Interrupt response in a multiple set buffer pool bus bridge | Wen-Tzer T. Chen, Richard Allen Kelley, Danny Marvin Neal | 2001-10-09 |
| 6295568 | Method and system for supporting multiple local buses operating at different frequencies | Richard Allen Kelley, Danny Marvin Neal | 2001-09-25 |
| 6240474 | Pipelined read transfers | Guy L. Guthrie, Richard Allen Kelley, Danny Marvin Neal | 2001-05-29 |
| 6223299 | Enhanced error handling for I/O load/store operations to a PCI device via bad parity or zero byte enables | Douglas Craig Bossen, Charles Andrew McLaughlin, Danny Marvin Neal, James O. Nicholson | 2001-04-24 |
| 6219737 | Read request performance of a multiple set buffer pool bus bridge | Wen-Tzer T. Chen, Richard Allen Kelley, Danny Marvin Neal | 2001-04-17 |
| 6185642 | Bus for high frequency operation with backward compatibility and hot-plug ability | Bruce Beukema, Ronald Edward Fuhs, Richard Allen Kelley, Danny Marvin Neal | 2001-02-06 |
| 6182178 | Method and system for supporting peripheral component interconnect (PCI) peer-to-peer access across a PCI host bridge supporting multiple PCI buses | Richard Allen Kelley, Danny Marvin Neal | 2001-01-30 |
| 6175888 | Dual host bridge with peer to peer support | Guy L. Guthrie, Richard Allen Kelley, Danny Marvin Neal | 2001-01-16 |
| 6134621 | Variable slot configuration for multi-speed bus | Richard Allen Kelley, Danny Marvin Neal, James O. Nicholson | 2000-10-17 |
| 6119191 | Performing PCI access cycles through PCI bridge hub routing | Danny Marvin Neal | 2000-09-12 |
| 6081863 | Method and system for supporting multiple peripheral component interconnect PCI buses by a single PCI host bridge within a computer system | Richard Allen Kelley, Danny Marvin Neal | 2000-06-27 |
| 6035355 | PCI system and adapter requirements following reset | Richard Allen Kelley, Danny Marvin Neal | 2000-03-07 |
| 5978869 | Enhanced dual speed bus computer system | Guy L. Guthrie, Richard Allen Kelley, Danny Marvin Neal | 1999-11-02 |
| 5898888 | Method and system for translating peripheral component interconnect (PCI) peer-to-peer access across multiple PCI host bridges within a computer system | Guy L. Guthrie, Danny Marvin Neal | 1999-04-27 |
| 5815647 | Error recovery by isolation of peripheral components in a data processing system | Patrick Allen Buckland, Danny Marvin Neal | 1998-09-29 |
| 5761462 | Method and system for supporting peripheral component interconnect (PCI) peer-to-peer access across multiple PCI host bridges within a data-processing system | Danny Marvin Neal | 1998-06-02 |