Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6492259 | Process for making a planar integrated circuit interconnect | Bachir Dirahoui, Daniel C. Edelstein, Harris C. Jones | 2002-12-10 |
| 6281583 | Planar integrated circuit interconnect | Bachir Dirahoui, Daniel C. Edelstein, Harris C. Jones | 2001-08-28 |
| 5874162 | Weighted sintering process and conformable load tile | Kurt E. Bastian, James J. Burte, Michael A. Cohn, Christopher N. Collins, Joseph P. DeGeorge +5 more | 1999-02-23 |