Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5365463 | Method for evaluating the timing of digital machines with statistical variability in their delays | Wilm E. Donath, Jeffrey P. Soreff | 1994-11-15 |
| 4700016 | Printed circuit board with vias at fixed and selectable locations | Eduardo Kellerman, John P. Koons | 1987-10-13 |
| 4656580 | Logic simulation machine | Matthew C. Graf | 1987-04-07 |
| 4263651 | Method for determining the characteristics of a logic block graph diagram to provide an indication of path delays between the blocks | Wilm E. Donath | 1981-04-21 |